Issued Patents All Time
Showing 1–25 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9666799 | Concave word line and convex interlayer dielectric for protecting a read/write layer | Naohito Yanagida, Cheng Feng, Michiaki Sano, Akira Nakada, Eiji Hayashi | 2017-05-30 |
| 8987802 | Method for using nanoparticles to make uniform discrete floating gate layer | Donovan Lee, James Kai, Vinod R. Purayath, George Matamis | 2015-03-24 |
| 8722518 | Methods for protecting patterned features during trench etch | Usha Raghuram, Samuel V. Dunton, Michael Konevecki | 2014-05-13 |
| 8658526 | Methods for increased array feature density | Huiwen Xu, Yung-Tin Chen | 2014-02-25 |
| 8637389 | Resist feature and removable spacer pitch doubling patterning method for pillar structures | Yung-Tin Chen | 2014-01-28 |
| 8372740 | Methods for increased array feature density | Huiwen Xu, Yung-Tin Chen | 2013-02-12 |
| 8357606 | Resist feature and removable spacer pitch doubling patterning method for pillar structures | Yung-Tin Chen | 2013-01-22 |
| 8329512 | Patterning method for high density pillar structures | Natalie Nguyen, Paul Wai Kie Poon, Michael Konevecki, Yung-Tin Chen, Raghuveer S. Makala +1 more | 2012-12-11 |
| 8252644 | Method for forming a nonvolatile memory cell comprising a reduced height vertical diode | Scott Brad Herner | 2012-08-28 |
| 8241969 | Patterning method for high density pillar structures | Natalie Nguyen, Paul Wai Kie Poon, Michael Konevecki, Yung-Tin Chen, Raghuveer S. Makala +1 more | 2012-08-14 |
| 8187932 | Three dimensional horizontal diode non-volatile memory array and method of making thereof | Natalie Nguyen, Paul Wai Kie Poon, Michael Konevecki, Raghuveer S. Makala | 2012-05-29 |
| 8138010 | Method for fabricating high density pillar structures by double patterning using positive photoresist | Roy E. Scheuerlein | 2012-03-20 |
| 8114765 | Methods for increased array feature density | Huiwen Xu, Yung-Tin Chen | 2012-02-14 |
| 8084347 | Resist feature and removable spacer pitch doubling patterning method for pillar structures | Yung-Tin Chen | 2011-12-27 |
| 8080443 | Method of making pillars using photoresist spacer mask | Yung-Tin Chen, Chun-Ming Wang | 2011-12-20 |
| 8071475 | Liner for tungsten/silicon dioxide interface in memory | Yoichiro Tanaka, Usha Raghuram | 2011-12-06 |
| 8026178 | Patterning method for high density pillar structures | Natalie Nguyen, Paul Wai Kie Poon, Michael Konevecki, Yung-Tin Chen, Raghuveer S. Makala +1 more | 2011-09-27 |
| 8018025 | Nonvolatile memory cell comprising a reduced height vertical diode | S. Brad Herner | 2011-09-13 |
| 7994068 | Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbon | Michael Konevecki | 2011-08-09 |
| 7982273 | Masking of repeated overlay and alignment marks to allow reuse of photomasks in a vertical structure | Yung-Tin Chen, Christopher J. Petti, Tanmay Kumar | 2011-07-19 |
| 7968277 | Imaging post structures using X and Y dipole optics and a single mask | Yung-Tin Chen, Paul Wai Kie Poon, Michael Konevecki | 2011-06-28 |
| 7935553 | Method for fabricating high density pillar structures by double patterning using positive photoresist | Roy E. Scheuerlein | 2011-05-03 |
| 7927977 | Method of making damascene diodes using sacrificial material | Raghuveer S. Makala, Vance Dunton, Yoichiro Tanaka, Steven Maxwell, Tong Zhang | 2011-04-19 |
| 7923305 | Patterning method for high density pillar structures | Natalie Nguyen, Paul Wai Kie Poon, Michael Konevecki, Yung-Tin Chen | 2011-04-12 |
| 7794921 | Imaging post structures using x and y dipole optics and a single mask | Yung-Tin Chen, Paul Wai Kie Poon, Michael Konevecki | 2010-09-14 |