Issued Patents All Time
Showing 26–50 of 58 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7732319 | Interconnection structure of integrated circuit chip | Se-Young Jeong, Sung-Min Sim, Soon-Bum Kim, In-Young Lee | 2010-06-08 |
| 7585700 | Ball grid array package stack | Jung Jin Kim, Dong-Ho Lee | 2009-09-08 |
| 7576440 | Semiconductor chip having bond pads and multi-chip package | Il-Heung Choi, Jeong-Jin Kim, Hae-Jeong Sohn, Chung Woo Lee | 2009-08-18 |
| 7547977 | Semiconductor chip having bond pads | Il-Heung Choi, Jeong-Jin Kim, Hae-Jeong Sohn, Chung Woo Lee | 2009-06-16 |
| 7541682 | Semiconductor chip having bond pads | Il-Heung Choi, Jeong-Jin Kim, Hae-Jeong Sohn, Chung Woo Lee | 2009-06-02 |
| 7524763 | Fabrication method of wafer level chip scale packages | Soon-Bum Kim, Ung-Kwang Kim, Keum-Hee Ma, Sung-Min Sim, Se-Yong Oh +2 more | 2009-04-28 |
| 7453159 | Semiconductor chip having bond pads | Il-Heung Choi, Jeong-Jin Kim, Hae-Jeong Sohn, Chung Woo Lee | 2008-11-18 |
| 7368821 | BGA semiconductor chip package and mounting structure thereof | Sang-Young Kim, Jin Ho Kim, Hee Jin Park, Tae-Sung Yoon | 2008-05-06 |
| 7368330 | Semiconductor device having fuse circuit on cell region and method of fabricating the same | Ill-heung Choi, Min Young Son, Min Sang Park | 2008-05-06 |
| 7317247 | Semiconductor package having heat spreader and package stack using the same | Jong-Joo Lee | 2008-01-08 |
| 7312143 | Wafer level chip scale package having a gap and method for manufacturing the same | Myeong-Soon Park, Hyun-Soo Chung, In-Young Lee, Jae-Sik Chung, Sung-Min Sim +2 more | 2007-12-25 |
| 7307342 | Interconnection structure of integrated circuit chip | Se-Young Jeong, Sung-Min Sim, Soon-Bum Kim, In-Young Lee | 2007-12-11 |
| 7215033 | Wafer level stack structure for system-in-package and method thereof | Kang-Wook Lee, Se-Yong Oh, Gu-Sung Kim | 2007-05-08 |
| 7208343 | Semiconductor chip, chip stack package and manufacturing method | Sa-Yoon Kang, Min Young Son | 2007-04-24 |
| 7205660 | Wafer level chip scale package having a gap and method for manufacturing the same | Myeong-Soon Park, Hyun-Soo Chung, In-Young Lee, Jae-Sik Chung, Sung-Min Sim +2 more | 2007-04-17 |
| 7151009 | Method for manufacturing wafer level chip stack package | Soon-Bum Kim, Ung-Kwang Kim, Kang-Wook Lee, Se-Young Jeong, Sung-Min Sim | 2006-12-19 |
| 7148578 | Semiconductor multi-chip package | Il-Heung Choi, Jeong-Jin Kim, Hae-Jeong Sohn, Chung Woo Lee | 2006-12-12 |
| 7071555 | Ball grid array package stack | Jung Jin Kim, Dong-Ho Lee | 2006-07-04 |
| 6855575 | Semiconductor chip package having a semiconductor chip with center and edge bonding pads and manufacturing method thereof | Ill-heung Choi | 2005-02-15 |
| 6852607 | Wafer level package having a side package | Ming Son, Woong Ky Ha | 2005-02-08 |
| 6849802 | Semiconductor chip, chip stack package and manufacturing method | Sa-Yoon Kang, Min Young Son | 2005-02-01 |
| 6825511 | Semiconductor device having fuse circuit on cell region and method of fabricating the same | Ill-heung Choi, Min Young Son, Min Sang Park | 2004-11-30 |
| 6724074 | Stack semiconductor chip package and lead frame | Hai-Jeong Sohn, Ill-heung Choi, Sung Ho Hong | 2004-04-20 |
| 6642627 | Semiconductor chip having bond pads and multi-chip package | Il-Heung Choi, Jeong-Jin Kim, Hae-Jeong Sohn, Chung Woo Lee | 2003-11-04 |
| 6617700 | Repairable multi-chip package and high-density memory card having the package | Joon Ki LEE, Young-Shin Kwon | 2003-09-09 |