Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11705376 | Semiconductor chip including chip pad, redistribution wiring test pad, and redistribution wiring connection pad | Hyun-Soo Chung, Chan-Ho Lee | 2023-07-18 |
| 11189535 | Semiconductor chip including chip pad, redistribution wiring test pad, and redistribution wiring connection pad | Hyun-Soo Chung, Chan-Ho Lee | 2021-11-30 |
| 10840159 | Semiconductor chip including chip pad, redistribution wiring test pad, and redistribution wiring connection pad | Hyun-Soo Chung, Chan-Ho Lee | 2020-11-17 |
| 10008462 | Semiconductor package | Sun-kyoung Seo, Tae-Je Cho, Yong-Hwan Kwon, Hyung-Gil Baek, Hyun-Soo Chung +1 more | 2018-06-26 |
| 9960112 | Semiconductor device | Chanho Lee, Hyunsoo Chung | 2018-05-01 |
| 9859204 | Semiconductor devices with redistribution pads | Hyunsoo Chung, Won Young Kim, Ae-Nee Jang, Chanho Lee | 2018-01-02 |
| 9219035 | Integrated circuit chips having vertically extended through-substrate vias therein | Ho-Jin Lee, Kang-Wook Lee, Ju-Il Choi, Son-Kwan Hwang | 2015-12-22 |
| 8629059 | Methods of forming integrated circuit chips having vertically extended through-substrate vias therein | Ho-Jin Lee, Kang-Wook Lee, Ju-Il Choi, Son-Kwan Hwang | 2014-01-14 |
| 8431479 | Semiconductor devices having redistribution structures and packages, and methods of forming the same | Ki Hyuk Kim, Nam-Seog Kim, Hyun-Soo Chung, Seok Ho Kim, Chang-Woo Shin | 2013-04-30 |
| 8193637 | Semiconductor package and multi-chip package using the same | Hyun-Soo Chung, Seok Ho Kim, Ki Hyuk Kim, Chang-Woo Shin | 2012-06-05 |
| 7875552 | Methods of forming integrated circuit chips having vertically extended through-substrate vias therein and chips formed thereby | Ho-Jin Lee, Kang-Wook Lee, Ju-Il Choi, Son-Kwan Hwang | 2011-01-25 |
| 7638365 | Stacked chip package and method for forming the same | Se-Young Jeong, Nam-Seog Kim, Cha-Jea Jo, Jong Ho Lee | 2009-12-29 |
| 7545027 | Wafer level package having redistribution interconnection layer and method of forming the same | Hyun-Soo Chung, In-Young Lee, Dong-Hyeon Jang, Dong-Ho Lee | 2009-06-09 |
| 7312143 | Wafer level chip scale package having a gap and method for manufacturing the same | Hyun-Soo Chung, In-Young Lee, Jae-Sik Chung, Sung-Min Sim, Dong-Hyeon Jang +2 more | 2007-12-25 |
| 7205660 | Wafer level chip scale package having a gap and method for manufacturing the same | Hyun-Soo Chung, In-Young Lee, Jae-Sik Chung, Sung-Min Sim, Dong-Hyeon Jang +2 more | 2007-04-17 |