Issued Patents All Time
Showing 76–100 of 155 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9900189 | Methods and circuits for asymmetric distribution of channel equalization between devices | Jared L. Zerbe, Fariborz Assaderaghi, Hae-Chang Lee, Jihong Ren, Qi Lin | 2018-02-20 |
| 9860089 | High-speed signaling systems and methods with adaptable, continuous-time equalization | Hae-Chang Lee, Jade M. Kizer, Thomas Hastings Greer, III, Akash Bansal | 2018-01-02 |
| 9859899 | Integrated circuit device having an injection-locked oscillator | Marko Aleksic | 2018-01-02 |
| 9843315 | Data transmission using delayed timing signals | Frederick A. Ware, Ely Tsern, Jared L. Zerbe | 2017-12-12 |
| 9843309 | Receiver with time-varying threshold voltage | Jared L. Zerbe, Qi Lin | 2017-12-12 |
| 9818463 | Memory control component with inter-rank skew tolerance | Frederick A. Ware, Ely Tsern, Wayne F. Ellis, Akash Bansal, John Brooks +1 more | 2017-11-14 |
| 9806727 | Integrated circuit having a clock deskew circuit that includes an injection-locked oscillator | Marko Aleksic | 2017-10-31 |
| 9785500 | Reduced-overhead error detection and correction | Frederick A. Ware | 2017-10-10 |
| 9774441 | Clock and data recovery using receiver clock spread spectrum modulation and offset compensation | Hae-Chang Lee, Thomas Hastings Greer, III, Jade M. Kizer, Mark A. Horowitz | 2017-09-26 |
| 9768947 | Clock and data recovery having shared clock generator | Masum Hossain, Jihong Ren | 2017-09-19 |
| 9748960 | Method and apparatus for source-synchronous signaling | Jared L. Zerbe, Hsuan-Jung Su, John Eble, Barry William Daly, Lei Luo +4 more | 2017-08-29 |
| 9742602 | High-speed signaling systems with adaptable pre-emphasis and equalization | Jared L. Zerbe, Fred F. Chen, Andrew Ho, Ramin Farjad-Rad, John W. Poulton +1 more | 2017-08-22 |
| 9734357 | Process authenticated memory page encryption | Trung Diep, Pradeep Batra, Frederick A. Ware | 2017-08-15 |
| 9735791 | Jitter-based clock selection | Jared L. Zerbe, Masum Hossain | 2017-08-15 |
| 9734879 | Memory device comprising programmable command-and-address and/or data interfaces | Ian Shaeffer, Lawrence Lai, Fan Ho, David A. Secker, Wayne S. Richardson +2 more | 2017-08-15 |
| 9720033 | On-chip parameter measurement | Jafar Savoj, Emerson S. Fang | 2017-08-01 |
| 9684321 | On-chip regulator with variable load compensation | Michael D. Bucher, Lei Luo, Chaofeng Huang, Amir Amirkhany, Huy M. Nguyen +2 more | 2017-06-20 |
| 9660844 | Decision feedback equalizer | Jaeha Kim | 2017-05-23 |
| 9577816 | Clock and data recovery having shared clock generator | Masum Hossain, Jihong Ren | 2017-02-21 |
| 9569396 | Interface with variable data rate | Yohan U. Frans, Hae-Chang Lee, Simon Li, Nhat Nguyen | 2017-02-14 |
| 9569308 | Reduced-overhead error detection and correction | Frederick A. Ware | 2017-02-14 |
| 9565036 | Techniques for adjusting clock signals to compensate for noise | Jared L. Zerbe, Pradeep Batra | 2017-02-07 |
| 9563597 | High capacity memory systems with inter-rank skew tolerance | Frederick A. Ware, Ely Tsern, Wayne F. Ellis, Akash Bansal, John Brooks +1 more | 2017-02-07 |
| 9564912 | Integrated circuit having a clock deskew circuit that includes an injection-locked oscillator | Marko Aleksic | 2017-02-07 |
| 9553745 | High-speed signaling systems with adaptable pre-emphasis and equalization | Jared L. Zerbe, Fred F. Chen, Andrew Ho, Ramin Farjad-Rad, John W. Poulton +1 more | 2017-01-24 |