Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12164808 | Quad-data-rate (QDR) host interface in a memory system | Lei Luo | 2024-12-10 |
| 12066958 | Clock generation for timing communications with ranks of memory devices | Jared L. Zerbe, Ian Shaeffer | 2024-08-20 |
| 11630788 | Clock generation for timing communications with ranks of memory devices | Jared L. Zerbe, Ian Shaeffer | 2023-04-18 |
| 10840920 | Method and apparatus for source-synchronous signaling | Jared L. Zerbe, Brian S. Leibowitz, Hsuan-Jung Su, Barry William Daly, Lei Luo +4 more | 2020-11-17 |
| 10705990 | Clock generation for timing communications with ranks of memory devices | Jared L. Zerbe, Ian Shaeffer | 2020-07-07 |
| 10541693 | Method and apparatus for source-synchronous signaling | Jared L. Zerbe, Brian S. Leibowitz, Hsuan-Jung Su, Barry William Daly, Lei Luo +4 more | 2020-01-21 |
| 10404262 | Integrated circuit having a multiplying injection-locked oscillator | Jared L. Zerbe, Barry William Daly, Dustin T. Dunwell, Anthony C. Carusone | 2019-09-03 |
| 10211841 | Method and apparatus for source-synchronous signaling | Jared L. Zerbe, Brian S. Leibowitz, Hsuan-Jung Su, Barry William Daly, Lei Luo +4 more | 2019-02-19 |
| 10162772 | Clock generation for timing communications with ranks of memory devices | Jared L. Zerbe, Ian Shaeffer | 2018-12-25 |
| 9748960 | Method and apparatus for source-synchronous signaling | Jared L. Zerbe, Brian S. Leibowitz, Hsuan-Jung Su, Barry William Daly, Lei Luo +4 more | 2017-08-29 |
| 9564911 | Integrated circuit having a multiplying injection-locked oscillator | Jared L. Zerbe, Barry William Daly, Dustin T. Dunwell, Anthony C. Carusone | 2017-02-07 |
| 9564879 | Reference voltage generation and calibration for single-ended signaling | Lei Luo, Barry William Daly, Kambiz Kaviani, John Wilson | 2017-02-07 |
| 9563228 | Clock generation for timing communications with ranks of memory devices | Jared L. Zerbe, Ian Shaeffer | 2017-02-07 |
| 9479176 | Methods and circuits for protecting integrated circuits from reverse engineering | Scott C. Best, Hanson Quan | 2016-10-25 |
| 9201444 | Clock generation for timing communications with ranks of memory devices | Jared L. Zerbe, Ian Shaeffer | 2015-12-01 |
| 9166838 | Reference voltage generation and calibration for single-ended signaling | Lei Luo, Barry William Daly, Kambiz Kaviani, John Wilson | 2015-10-20 |
| 9154145 | Integrated circuit having a multiplying injection-locked oscillator | Jared L. Zerbe, Barry William Daly, Dustin T. Dunwell, Anthony C. Carusone | 2015-10-06 |
| 8867595 | Reference voltage generation and calibration for single-ended signaling | Lei Luo, Barry William Daly, Kambiz Kaviani, John Wilson | 2014-10-21 |
| 8836394 | Method and apparatus for source-synchronous signaling | Jared L. Zerbe, Brian S. Leibowitz, Hsuan-Jung Su, Barry William Daly, Lei Luo +4 more | 2014-09-16 |
| 8743973 | Receiver resistor network for common-mode signaling | Lei Luo, Brian S. Leibowitz, Jared L. Zerbe, Barry William Daly, Wayne D. Dettloff +1 more | 2014-06-03 |
| 8588280 | Asymmetric communication on shared links | Kyung Suk Oh, John Wilson, Frederick A. Ware, WooPoung KIM, Jade M. Kizer +2 more | 2013-11-19 |
| 8498344 | Frequency responsive bus coding | John Wilson, Aliazam Abbasfar, Lei Luo, Jade M. Kizer, Carl W. Werner +1 more | 2013-07-30 |
| 8451674 | Clock synchronization in a memory system | Jade M. Kizer, John M. Wilson, Frederick A. Ware | 2013-05-28 |
| 8159887 | Clock synchronization in a memory system | Jade M. Kizer, John Wilson, Frederick A. Ware | 2012-04-17 |
| 8068357 | Memory controller with multi-modal reference pad | Frederick A. Ware, John Wilson, Jade M. Kizer, Lei Luo, John W. Poulton +1 more | 2011-11-29 |