Issued Patents All Time
Showing 51–75 of 155 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10521391 | Chip to chip interface with scalable bandwidth | Jafar Savoj, Jose A. Tierno, Sanjeev K. Maheshwari, Pradeep Trivedi, Gin Yee +1 more | 2019-12-31 |
| 10466289 | Apparatus and method for controllably injecting jitter into recovered clock to simulate presence of jitter in input signal | Hae-Chang Lee, Jaeha Kim | 2019-11-05 |
| 10452601 | Interface with variable data rate | Yohan U. Frans, Hae-Chang Lee, Simon Li, Nhat Nguyen | 2019-10-22 |
| 10432389 | Receiver with enhanced clock and data recovery | Hae-Chang Lee, Jaeha Kim, Jafar Savoj | 2019-10-01 |
| 10401900 | Using a stuttered clock signal to reduce self-induced voltage noise | Jared L. Zerbe | 2019-09-03 |
| 10404236 | Receiver with time-varying threshold voltage | Jared L. Zerbe, Qi Lin | 2019-09-03 |
| 10404258 | Integrated circuit device having an injection-locked oscillator | Marko Aleksic | 2019-09-03 |
| 10397028 | Decision feedback equalizer | Jaeha Kim | 2019-08-27 |
| 10263761 | Clock and data recovery having shared clock generator | Masum Hossain, Jihong Ren | 2019-04-16 |
| 10230379 | Downshift techniques for oscillator with feedback loop | Jared L. Zerbe, Sanjay Pant | 2019-03-12 |
| 10211841 | Method and apparatus for source-synchronous signaling | Jared L. Zerbe, Hsuan-Jung Su, John Eble, Barry William Daly, Lei Luo +4 more | 2019-02-19 |
| 10205614 | High-speed signaling systems with adaptable pre-emphasis and equalization | Jared L. Zerbe, Fred F. Chen, Andrew Ho, Ramin Farjad-Rad, John W. Poulton +2 more | 2019-02-12 |
| 10205461 | Integrated circuit having a clock deskew circuit that includes an injection-locked oscillator | Marko Aleksic | 2019-02-12 |
| 10205458 | Run-time output clock determination | Jared L. Zerbe, Masum Hossain | 2019-02-12 |
| 10192598 | Memory device comprising programmable command-and-address and/or data interfaces | Ian Shaeffer, Lawrence Lai, Fan Ho, David A. Secker, Wayne S. Richardson +2 more | 2019-01-29 |
| 10170170 | Memory control component with dynamic command/address signaling rate | Frederick A. Ware, Ely Tsern, Wayne F. Ellis, Akash Bansal, John Brooks +1 more | 2019-01-01 |
| 10135646 | High-speed signaling systems and methods with adaptable, continuous-time equalization | Hae-Chang Lee, Jade M. Kizer, Thomas Hastings Greer, III, Akash Bansal | 2018-11-20 |
| 10135647 | Methods and circuits for asymmetric distribution of channel equalization between devices | Jared L. Zerbe, Fariborz Assaderaghi, Hae-Chang Lee, Jihong Ren, Qi Lin | 2018-11-20 |
| 10135427 | Receiver with time-varying threshold voltage | Jared L. Zerbe, Qi Lin | 2018-11-20 |
| 10067519 | On-chip regulator with variable load compensation | Michael D. Bucher, Lei Luo, Chaofeng Huang, Amir Amirkhany, Huy M. Nguyen +2 more | 2018-09-04 |
| 10050771 | Clock and data recovery having shared clock generator | Masum Hossain, Jihong Ren | 2018-08-14 |
| 10044530 | Edge based partial response equalization | Hae-Chang Lee, Jihong Ren, Ruwan Ratnayake | 2018-08-07 |
| 10003484 | High-speed signaling systems with adaptable pre-emphasis and equalization | Jared L. Zerbe, Fred F. Chen, Andrew Ho, Ramin Farjad-Rad, John W. Poulton +1 more | 2018-06-19 |
| 9973328 | Receiver with enhanced clock and data recovery | Hae-Chang Lee, Jaeha Kim, Jafar Savoj | 2018-05-15 |
| 9940299 | Interface with variable data rate | Yohan U. Frans, Hae-Chang Lee, Simon Li, Nhat Nguyen | 2018-04-10 |