Issued Patents All Time
Showing 25 most recent of 76 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11023403 | Chip to chip interface with scalable bandwidth | Jafar Savoj, Jose A. Tierno, Sanjeev K. Maheshwari, Brian S. Leibowitz, Gin Yee +1 more | 2021-06-01 |
| 10521391 | Chip to chip interface with scalable bandwidth | Jafar Savoj, Jose A. Tierno, Sanjeev K. Maheshwari, Brian S. Leibowitz, Gin Yee +1 more | 2019-12-31 |
| 10241537 | Digital on-chip duty cycle monitoring device | Huaimin Li, Fabien S. Faure, Shy Hamami, Yaron Cohen | 2019-03-26 |
| 8373470 | Modular programmable delay line blocks for use in a delay locked loop | Vincent R. von Kaenel | 2013-02-12 |
| 8368444 | Delay locked loop including a mechanism for reducing lock time | Vincent R. von Kaenel | 2013-02-05 |
| 8341578 | Clock gater with test features and low setup time | Brian J. Campbell, Shaishav Desai, Edgardo F. Klass, Sridhar Narayanan | 2012-12-25 |
| 8026754 | Low latency flop circuit | Honkai Tam | 2011-09-27 |
| 7779372 | Clock gater with test features and low setup time | Brian J. Campbell, Shaishav Desai, Edgardo F. Klass, Sridhar Narayanan | 2010-08-17 |
| 7263628 | Method and apparatus for receiver circuit tuning | Claude Gauthier, Aninda Roy, Brian Amick | 2007-08-28 |
| 7251305 | Method and apparatus to store delay locked loop biasing parameters | Claude Gauthier, Brian Amick, Dean Liu | 2007-07-31 |
| 7129800 | Compensation technique to mitigate aging effects in integrated circuit components | Claude Gauthier, Raymond A. Heald, Gin Yee | 2006-10-31 |
| 7106113 | Adjustment and calibration system for post-fabrication treatment of phase locked loop input receiver | Claude Gauthier, Brian Amick, Dean Liu | 2006-09-12 |
| 7054787 | Embedded integrated circuit aging sensor system | Claude Gauthier, Gin Yee | 2006-05-30 |
| 6998887 | Calibration technique for phase locked loop leakage current | Claude Gauthier, Brian Amick | 2006-02-14 |
| 6976235 | Region-based voltage drop budgets for low-power design | Sudhakar Bobba, Gin Yee | 2005-12-13 |
| 6973398 | System level reduction of clock skew based on local thermal profiling | Claude Gauthier | 2005-12-06 |
| 6971079 | Accuracy of timing analysis using region-based voltage drop budgets | Gin Yee, Sudhakar Bobba | 2005-11-29 |
| 6954913 | System and method for in-situ signal delay measurement for a microprocessor | Claude Gauthier | 2005-10-11 |
| 6882196 | Duty cycle corrector | Gin Yee, Sudhakar Bobba, Claude Gauthier, Dean Liu, Lynn Ooi | 2005-04-19 |
| 6861885 | Phase locked loop design with diode for loop filter capacitance leakage current control | Sudhakar Bobba, Claude Gauthier | 2005-03-01 |
| 6859068 | Self-correcting I/O interface driver scheme for memory interface | Priya Ananthanarayanan | 2005-02-22 |
| 6829548 | DLL static phase error measurement technique | Priya Ananthanarayanan, Claude Gauthier | 2004-12-07 |
| 6819192 | Jitter estimation for a phase locked loop | Claude Gauthier, Brian Amick, Dean Liu | 2004-11-16 |
| 6812755 | Variation reduction technique for charge pump transistor aging | Gin Yee, Claude Gauthier | 2004-11-02 |
| 6812758 | Negative bias temperature instability correction technique for delay locked loop and phase locked loop bias generators | Claude Gauthier, Gin Yee | 2004-11-02 |