Issued Patents All Time
Showing 176–200 of 226 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10498367 | Progressive effort decoder architecture | Nicholas J. Richardson, Patrick R. Khayat, Mustafa N. Kaynak, Ka Leung Ling, Robert B. Eisenhuth | 2019-12-03 |
| 10439648 | Area efficient implementation of a product code error correcting code decoder | Patrick R. Khayat, Shantilal Rayshi Doru, Nicholas J. Richardson | 2019-10-08 |
| 10423350 | Partially written block treatment | Terry M. Grunzke, Lucia Botticchio, Walter Di Francesco, Vamshi K. Indavarapu, Gianfranco Valeri +4 more | 2019-09-24 |
| 10340014 | Monitoring error correction operations performed in memory | Mustafa N. Kaynak, Patrick R. Khayat | 2019-07-02 |
| 10331514 | Tiered error correction code (ECC) operations in memory | Mustafa N. Kaynak, Patrick R. Khayat | 2019-06-25 |
| 10326479 | Apparatuses and methods for layer-by-layer error correction | Mustafa N. Kaynak, Patrick R. Khayat, Nicholas J. Richardson | 2019-06-18 |
| 10318378 | Redundant array of independent NAND for a three-dimensional memory array | Jung Sheng Hoei, Sampath K. Ratnam, Renato C. Padilla, Kishore Kumar Muchherla, Peter Feeley | 2019-06-11 |
| 10312944 | Error correction code (ECC) operations in memory for providing redundant error correction | Patrick R. Khayat, Mustafa N. Kaynak | 2019-06-04 |
| 10289484 | Apparatuses and methods for generating probabilistic information with current integration sensing | Patrick R. Khayat, Mustafa N. Kaynak, Mark A. Helm, Aaron Yip | 2019-05-14 |
| 10275541 | Proactive corrective actions in memory based on a probabilistic data structure | Saeed Sharifi Tehrani | 2019-04-30 |
| 10193577 | Stopping criteria for layered iterative error correction | Mustafa N. Kaynak, William H. Radke, Patrick R. Khayat | 2019-01-29 |
| 10135465 | Error correction methods and apparatuses using first and second decoders | Mustafa N. Kaynak, Patrick R. Khayat | 2018-11-20 |
| 10110256 | Apparatuses and methods for staircase code encoding and decoding for storage devices | Patrick R. Khayat, Mustafa N. Kaynak | 2018-10-23 |
| 10061643 | Estimating an error rate associated with memory | Mustafa N. Kaynak, Patrick R. Khayat, Nicholas J. Richardson | 2018-08-28 |
| 9990988 | Determining whether a memory cell state is in a valley between adjacent data states | Patrick R. Khayat, Mustafa N. Kaynak, Robert B. Eisenhuth | 2018-06-05 |
| 9904594 | Monitoring error correction operations performed in memory | Mustafa N. Kaynak, Patrick R. Khayat | 2018-02-27 |
| 9875792 | Determining soft data for fractional digit memory cells | Patrick R. Khayat, Mustafa N. Kaynak | 2018-01-23 |
| 9837119 | Identifying a defect in a data-storage medium | Shayan Srinivasa Garani | 2017-12-05 |
| 9685243 | Determining soft data from a hard read | Patrick R. Khayat, Mustafa N. Kaynak | 2017-06-20 |
| 9654144 | Progressive effort decoder architecture | Nicholas J. Richardson, Patrick R. Khayat, Mustafa N. Kaynak, Ka Leung Ling, Robert B. Eisenhuth | 2017-05-16 |
| 9577673 | Error correction methods and apparatuses using first and second decoders | Mustafa N. Kaynak, Patrick R. Khayat | 2017-02-21 |
| 9558064 | Estimating an error rate associated with memory | Mustafa N. Kaynak, Patrick R. Khayat, Nicholas J. Richardson | 2017-01-31 |
| 9450618 | Max-Log-MAP equivalence log likelihood ratio generation soft Viterbi architecture system and method | Lun Bin Huang, Alessandro Risso | 2016-09-20 |
| 9412472 | Determining soft data from a hard read | Patrick R. Khayat, Mustafa N. Kaynak | 2016-08-09 |
| 9391645 | Determining soft data using a classification code | Patrick R. Khayat, Mustafa N. Kaynak | 2016-07-12 |