Issued Patents All Time
Showing 226–250 of 258 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11296708 | Low power ferroelectric based majority logic gate adder | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2022-04-05 |
| 11294985 | Efficient analog in-memory matrix multiplication processor | Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young, Ram Krishnamurthy | 2022-04-05 |
| 11295796 | Apparatus and method for endurance of non-volatile memory banks via wear leveling and random swap injection | Christopher B. Wilkerson, Sasikanth Manipatruni, Rajeev Kumar Dokania | 2022-04-05 |
| 11290111 | Majority logic gate based and-or-invert logic gate with non-linear input capacitors | Sasikanth Manipatruni, Rafael Rios, Neal Reynolds, Ikenna Odinaka, Robert Menezes +2 more | 2022-03-29 |
| 11290112 | Majority logic gate based XOR logic gate with non-linear input capacitors | Sasikanth Manipatruni, Rafael Rios, Neal Reynolds, Ikenna Odinaka, Robert Menezes +2 more | 2022-03-29 |
| 11289497 | Integration method of ferroelectric memory array | Gaurav Thareja, Sasikanth Manipatruni, Rajeev Kumar Dokania, Ramamoorthy Ramesh | 2022-03-29 |
| 11283453 | Low power ferroelectric based majority logic gate carry propagate and serial adder | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2022-03-22 |
| 11277137 | Majority logic gate with non-linear input capacitors | Sasikanth Manipatruni, Rafael Rios, Neal Reynolds, Ikenna Odinaka, Robert Menezes +2 more | 2022-03-15 |
| 11171115 | Artificial intelligence processor with three-dimensional stacked memory | Sasikanth Manipatruni, Rajeev Kumar Dokania, Ramamoorthy Ramesh | 2021-11-09 |
| 11165430 | Majority logic gate based sequential circuit | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-11-02 |
| 11151046 | Programmable interface to in-memory cache processor | Sasikanth Manipatruni, Victor W. Lee, Huseyin Ekin Sumbul, Gregory K. Chen, Raghavan Kumar +4 more | 2021-10-19 |
| 11152343 | 3D integrated ultra high-bandwidth multi-stacked memory | Rajeev Kumar Dokania, Sasikanth Manipatruni, Debo Olaosebikan | 2021-10-19 |
| 11138499 | Applications of back-end-of-line (BEOL) capacitors in compute-in-memory (CIM) circuits | Abhishek A. Sharma, Jack T. Kavalieros, Ian A. Young, Sasikanth Manipatruni, Ram Krishnamurthy +7 more | 2021-10-05 |
| 11139270 | Artificial intelligence processor with three-dimensional stacked memory | Sasikanth Manipatruni, Rajeev Kumar Dokania, Ramamoorthy Ramesh | 2021-10-05 |
| 11061646 | Compute in memory circuits with multi-Vdd arrays and/or analog multipliers | Huseyin Ekin Sumbul, Phil Knag, Gregory K. Chen, Raghavan Kumar, Abhishek A. Sharma +3 more | 2021-07-13 |
| 11048434 | Compute in memory circuits with time-to-digital computation | Raghavan Kumar, Phil Knag, Gregory K. Chen, Huseyin Ekin Sumbul, Sasikanth Manipatruni +3 more | 2021-06-29 |
| 11043472 | 3D integrated ultra high-bandwidth memory | Rajeev Kumar Dokania, Sasikanth Manipatruni, Debo Olaosebikan | 2021-06-22 |
| 11025254 | Linear input and non-linear output threshold logic gate | Sasikanth Manipatruni, Robert Menezes, Yuan-Sheng Fang, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-06-01 |
| 11018672 | Linear input and non-linear output majority logic gate | Sasikanth Manipatruni, Robert Menezes, Yuan-Sheng Fang, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-05-25 |
| 11016701 | Oscillator circuitry to facilitate in-memory computation | Ian A. Young, Ram Krishnamurthy, Sasikanth Manipatruni, Abhishek A. Sharma, Raghavan Kumar +3 more | 2021-05-25 |
| 11012076 | Linear input and non-linear output majority logic gate with and/or function | Sasikanth Manipatruni, Robert Menezes, Yuan-Sheng Fang, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-05-18 |
| 10956813 | Compute-in-memory circuit having a multi-level read wire with isolated voltage distributions | Ian A. Young, Ram Krishnamurthy, Sasikanth Manipatruni, Gregory K. Chen, Abhishek A. Sharma +3 more | 2021-03-23 |
| 10951213 | Majority logic gate fabrication | Sasikanth Manipatruni, Robert Menezes, Yuan-Sheng Fang, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-03-16 |
| 10944404 | Low power ferroelectric based majority logic gate adder | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Gaurav Thareja +1 more | 2021-03-09 |
| 10884957 | Pipeline circuit architecture to provide in-memory computation functionality | Sasikanth Manipatruni, Victor W. Lee, Abhishek A. Sharma, Huseyin Ekin Sumbul, Gregory K. Chen +4 more | 2021-01-05 |