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Bi-modal halo implantation |
Akif Sultan, David Wu, Mark B. Fuselier |
2007-02-13 |
| 7138318 |
Method of fabricating body-tied SOI transistor having halo implant region underlying hammerhead portion of gate |
Donggang D. Wu |
2006-11-21 |
| 6977195 |
Test structure for characterizing junction leakage current |
John J. Bush, Robert H. Dawson |
2005-12-20 |
| 6881616 |
System for forming a semiconductor device and method thereof including implanting through a L shaped spacer to form source and drain regions |
Kay Hellig, Douglas J. Bonser |
2005-04-19 |
| 6780776 |
Nitride offset spacer to minimize silicon recess by using poly reoxidation layer as etch stop layer |
John G. Pellerin, William G. En, Mark W. Michael, Darin A. Chan |
2004-08-24 |
| 6713357 |
Method to reduce parasitic capacitance of MOS transistors |
Hai Hong Wang, Mark W. Michael, William G. En, John G. Pellerin |
2004-03-30 |