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| 11086630 |
Finish exception handling of an instruction completion table |
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| 11068274 |
Prioritized instructions in an instruction completion table of a simultaneous multithreading processor |
Kenneth L. Ward, Susan E. Eisen, Dung Q. Nguyen, Albert J. Van Norstrand, Jr., Glenn O. Kincaid |
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High bandwidth logical register flush recovery |
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Instruction completion table with ready-to-complete vector |
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Logical register recovery within a processor |
Steven J. Battle, Salma Ayub, Brian D. Barrick, Joshua W. Bowman, Susan E. Eisen +2 more |
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Kurt A. Feiste, Joshua W. Bowman, Dung Q. Nguyen, Deepak Singh, Brian W. Thompto |
2021-03-02 |
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Parallel slice processor shadowing states of hardware threads across execution slices |
Kurt A. Feiste, Dung Q. Nguyen, Eula A. Tolentino, Tien T. Tran, Jing Zhang |
2020-11-17 |
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Fuel filter insert with a prefilter and a main filter element, and fuel filter |
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2020-09-15 |
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Mechanism to stop completions using stop codes in an instruction completion table |
Kenneth L. Ward, Dung Q. Nguyen, Susan E. Eisen, Joe Lee, Deepak Singh |
2020-07-14 |
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Control valve for adjusting a fluid flow |
Dietmar Talmon-Gros, Christoph Baumann, Markus Braeuer |
2020-06-23 |
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Fuel filter comprising a fuel filter insert with a prefilter element and a main filter element |
Lars Spelter, Idriss Razgani, Jonas Eble, Christoph Baumann |
2020-06-02 |
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Efficiently managing speculative finish tracking and error handling for load instructions |
Susan E. Eisen, David A. Hrusecky, Dung Q. Nguyen, A. James Van Norstrand, Jr., Kenneth L. Ward |
2020-02-04 |
| 10423423 |
Efficiently managing speculative finish tracking and error handling for load instructions |
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2019-09-24 |
| 10255071 |
Method and apparatus for managing a speculative transaction in a processing unit |
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2019-04-09 |
| 10248426 |
Direct register restore mechanism for distributed history buffers |
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2019-04-02 |
| 10240565 |
Fuel filter insert having a pre- and a main filter element, and a fuel filter |
Christoph Baumann, Idriss Razgani, Jonas Eble, Lars Spelter |
2019-03-26 |
| 10102001 |
Parallel slice processor shadowing states of hardware threads across execution slices |
Kurt A. Feiste, Dung Q. Nguyen, Eula A. Tolentino, Tien T. Tran, Jing Zhang |
2018-10-16 |
| 9977677 |
Execution slice with supplemental instruction port for an instruction using a source operand from another instruction port |
Kurt A. Feiste, Dung Q. Nguyen, Eula Faye Abalos Tolentino, Tien T. Tran, Jing Zhang |
2018-05-22 |
| D634192 |
Mint lid |
— |
2011-03-15 |
