Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9111774 | Wafer-to-wafer stack with supporting post | Ra-Min Tain, Shyi-Ching Liau, Wei-Chung Lo, Rong-Shen Lee | 2015-08-18 |
| 8810031 | Wafer-to-wafer stack with supporting pedestal | Ra-Min Tain, Shyi-Ching Liau, Wei-Chung Lo, Rong-Shen Lee | 2014-08-19 |
| 8164165 | Wafer-to-wafer stack with supporting pedestal | Ra-Min Tain, Shyi-Ching Liau, Wei-Chung Lo, Rong-Shen Lee | 2012-04-24 |
| 7948072 | Wafer-to-wafer stacking | Ra-Min Tain, Shu-Ming Chang, Shyi-Ching Liau, Wei-Chung Lo, Rong-Shen Lee | 2011-05-24 |
| 7667338 | Package with solder-filled via holes in molding layers | Paul T. Lin | 2010-02-23 |
| 7374811 | Probe pad structure in a ceramic space transformer | Bahadir Tunaboylu | 2008-05-20 |
| 7227268 | Placement of sacrificial solder balls underneath the PBGA substrate | William T. Chen, Ajit K. Trivedi | 2007-06-05 |
| 6829149 | Placement of sacrificial solder balls underneath the PBGA substrate | William T. Chen, Ajit K. Trivedi | 2004-12-07 |
| 6353182 | Proper choice of the encapsulant volumetric CTE for different PGBA substrates | William T. Chen, Ajit K. Trivedi | 2002-03-05 |
| 6255599 | Relocating the neutral plane in a PBGA substrate to eliminate chip crack and interfacial delamination | William T. Chen, Ajit K. Trivedi | 2001-07-03 |
| 6188305 | Transformer formed in conjunction with printed circuit board | Michael J. Johnson, Craig N. Johnston, John M. Lauffer | 2001-02-13 |
| 6000130 | Process for making planar redistribution structure | Frank D. Egitto | 1999-12-14 |
| 5959348 | Construction of PBGA substrate for flip chip packing | William T. Chen, Ajit K. Trivedi | 1999-09-28 |
| 5774340 | Planar redistribution structure and printed wiring device | Frank D. Egitto | 1998-06-30 |
| 5684392 | System for extending operating time of a battery-operated electronic device | Jonathan J. Hurd, Stephen F. Newton | 1997-11-04 |
| 5546321 | Method and apparatus for the cross-sectional design of multi-layer printed circuit boards | Subahu D. Desai, Debra A. Gernhart, Phillip A. Hartley, Robert J. Haskins, Jr., Keith Ky Trieu Ho +5 more | 1996-08-13 |
| 5519633 | Method and apparatus for the cross-sectional design of multi-layer printed circuit boards | Subahu D. Desai, Debra A. Gernhart, Phillip A. Hartley, Robert J. Haskins, Jr., Keith Ky Trieu Ho +5 more | 1996-05-21 |
| 5248262 | High density connector | Raymond A. Busacco, Fletcher W. Chapin, David W. Dranchak, Thomas G. Macek, James R. Petrozello +2 more | 1993-09-28 |
| 5191174 | High density circuit board and method of making same | Joseph G. Hoffarth, Voya R. Markovich, Keith A. Snyder, John P. Wiley | 1993-03-02 |
| T106201 | Master image chip organization technique or method | John Balyoz, Barry C. Fox, John A. Palmieri, Majid Ghafghaichi, Teh-Sen Jen +1 more | 1986-03-04 |
| 4295149 | Master image chip organization technique or method | John Balyoz, Barry C. Fox, John A. Palmieri, Majid Ghafghaichi, Teh-Sen Jen +1 more | 1981-10-13 |
| 4249193 | LSI Semiconductor device and fabrication thereof | John Balyoz, Barry C. Fox, John A. Palmieri, Majid Ghafghaichi, Teh-Sen Jen +1 more | 1981-02-03 |