| 4737836 |
VLSI integrated circuit having parallel bonding areas |
Haluk O. Askin, Doyle E. Beaty, Jr., Joseph R. Cavaliere, Guy Rabbat, Achilles A. Sarris |
1988-04-12 |
| T106201 |
Master image chip organization technique or method |
Chi-Shih Chang, Barry C. Fox, John A. Palmieri, Majid Ghafghaichi, Teh-Sen Jen +1 more |
1986-03-04 |
| T101804 |
Integrated circuit layout utilizing separated active circuit and wiring regions |
Algirdas J. Grwodis |
1982-05-04 |
| 4295149 |
Master image chip organization technique or method |
Chi-Shih Chang, Barry C. Fox, John A. Palmieri, Majid Ghafghaichi, Teh-Sen Jen +1 more |
1981-10-13 |
| T100501 |
Integrated circuit layout utilizing separated active circuit and wiring regions |
Algirdas J. Gruodis |
1981-04-07 |
| 4249193 |
LSI Semiconductor device and fabrication thereof |
Chi-Shih Chang, Barry C. Fox, John A. Palmieri, Majid Ghafghaichi, Teh-Sen Jen +1 more |
1981-02-03 |
