WR

Willy Rachmady

IN Intel: 347 patents #15 of 30,777Top 1%
SO Sony: 10 patents #4,411 of 25,231Top 20%
Google: 2 patents #10,498 of 22,993Top 50%
TR Tahoe Research: 1 patents #81 of 215Top 40%
📍 Beaverton, OR: #4 of 3,140 inventorsTop 1%
🗺 Oregon: #16 of 28,073 inventorsTop 1%
Overall (All Time): #824 of 4,157,543Top 1%
360
Patents All Time

Issued Patents All Time

Showing 351–360 of 360 patents

Patent #TitleCo-InventorsDate
7704835 Method of forming a selective spacer in a semiconductor device Rajwinder Singh, Uday Shah, Jack T. Kavalieros 2010-04-27
7700470 Selective anisotropic wet etching of workfunction metal for semiconductor devices Uday Shah, Jack T. Kavalieros, Brian S. Doyle 2010-04-20
7670894 Selective high-k dielectric film deposition for semiconductor device Marko Radosavljevic, Mantu K. Hudait, Matthew V. Metz 2010-03-02
7670928 Ultra-thin oxide bonding for S1 to S1 dual orientation bonding Mohamad A. Shaheen, Peter G. Tolchinsky 2010-03-02
7560358 Method of preparing active silicon regions for CMOS or other devices Seiyon Kim, Peter L. D. Chang, Ibrahim Ban 2009-07-14
7517772 Selective etch for patterning a semiconductor film deposited non-selectively Anand S. Murthy 2009-04-14
7494858 Transistor with improved tip profile and method of manufacture thereof Mark Bohr, Steven J. Keating, Thomas A. Letson, Anand S. Murthy, Donald W. O'Neill 2009-02-24
7435683 Apparatus and method for selectively recessing spacers on multi-gate devices Jack T. Kavalieros, Uday Shah, Brian S. Doyle 2008-10-14
7364976 Selective etch for patterning a semiconductor film deposited non-selectively Anand S. Murthy 2008-04-29
7354832 Tri-gate device with conformal PVD workfunction metal on its three-dimensional body and fabrication method thereof Brian S. Doyle, Jack T. Kavalieros, Uday Shah 2008-04-08