Issued Patents All Time
Showing 26–49 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7822900 | Apparatus and method for enumeration of processors during hot-plug of a compute node | James B. Crossland, Mohan J. Kumar, Linda J. Rankin, David J. O'Shea | 2010-10-26 |
| 7769938 | Processor selection for an interrupt identifying a processor cluster | Keshavan Tiruvallur, James B. Crossland, Sridhar Muthrasanallur, Rajesh S. Parthasarathy, Luke Hood | 2010-08-03 |
| 7761720 | Mechanism for processor power state aware distribution of lowest priority interrupts | John W. Horigan, Alon Naveh, James B. Crossland | 2010-07-20 |
| 7743233 | Sequencer address management | Hong Wang, Gautham Chinya, Richard Hankins, Bryant Bigbee, John Shen +13 more | 2010-06-22 |
| 7673090 | Hot plug interface control method and apparatus | Ling Cen, James B. Crossland, Mohan J. Kumar, Linda J. Rankin, David J. O'Shea | 2010-03-02 |
| 7640384 | Queued locks using monitor-memory wait | Per Hammarlund, James B. Crossland, Anil Aggarwal | 2009-12-29 |
| 7627706 | Creation of logical APIC ID with cluster ID and intra-cluster ID | Keshavan Tiruvallur, James B. Crossland, Sridhar Muthrasanallur, Rajesh S. Parthasarathy, Luke Hood | 2009-12-01 |
| 7546487 | OS and firmware coordinated error handling using transparent firmware intercept and firmware services | Suresh Marisetty, Andrew J. Fish, Koichi Yamada, Scott Brenden, James B. Crossland +2 more | 2009-06-09 |
| 7493438 | Apparatus and method for enumeration of processors during hot-plug of a compute node | James B. Crossland, Mohan J. Kumar, Linda J. Rankin, David J. O'Shea | 2009-02-17 |
| 7376775 | Apparatus, system, and method to enable transparent memory hot plug/remove | Lily P. Looi, Stanley Steven Kulick, Dean Mulla, Ashish Gupta, Keith Robert Pflederer +2 more | 2008-05-20 |
| 7360103 | P-state feedback to operating system with hardware coordination | Bernard Lint, Alon Naveh, Jeffrey R. Wilcox, Lance Hacking, Ping Sager +2 more | 2008-04-15 |
| 7328293 | Queued locks using monitor-memory wait | Per Hammarlund, James B. Crossland, Anil Aggarwal | 2008-02-05 |
| 7315952 | Power state coordination between devices sharing power-managed resources | Jeffrey R. Wilcox, Stephen H. Gunther, Devadatta V. Bodas, Siva Ramakrishnan, David I. Poisner +1 more | 2008-01-01 |
| 7272741 | Hardware coordination of power management activities | Jeffrey R. Wilcox, Stephen H. Gunther, Devadatta V. Bodas, Siva Ramakrishnan, David I. Poisner +2 more | 2007-09-18 |
| 7213093 | Queued locks using monitor-memory wait | Per Hammarlund, James B. Crossland, Anil Aggarwal | 2007-05-01 |
| 7191349 | Mechanism for processor power state aware distribution of lowest priority interrupt | John W. Horigan, Alon Naveh, James B. Crossland | 2007-03-13 |
| 7146514 | Determining target operating frequencies for a multiprocessor system | Ping Sager | 2006-12-05 |
| 7117311 | Hot plug cache coherent interface method and apparatus | Linda J. Rankin, James B. Crossland, Mohan J. Kumar, David J. O'Shea | 2006-10-03 |
| 7117396 | Scalable CPU error recorder | Eshwari P. Komarla, Suresh Marisetty, Mani Ayyar, Andrew J. Fish, Mohan J. Kumar | 2006-10-03 |
| 7000102 | Platform and method for supporting hibernate operations | Mohan J. Kumar, James B. Crossland, Linda J. Rankin, David J. O'Shea | 2006-02-14 |
| 6920581 | Method and apparatus for functional redundancy check mode recovery | Bryant Bigbee, James B. Crossland | 2005-07-19 |
| 6917999 | Platform and method for initializing components within hot-plugged nodes | Mohan J. Kumar, James B. Crossland, Linda J. Rankin, David J. O'Shea | 2005-07-12 |
| 6857066 | Apparatus and method to identify the maximum operating frequency of a processor | Bryant Bigbee, Frank Binns | 2005-02-15 |
| 6526431 | Maintaining extended and traditional states of a processing unit in task switching | Bryant Bigbee, Kenneth Reneris | 2003-02-25 |