Issued Patents All Time
Showing 26–46 of 46 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6802039 | Using hardware or firmware for cache tag and data ECC soft error correction | Jeen-Yuan Miin | 2004-10-05 |
| 6775746 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | John H. Crawford, Greg Mathews, Edward T. Grochowski, Chakravarthy Kosaraju | 2004-08-10 |
| 6772383 | Combined tag and data ECC for enhanced soft error recovery from cache tag errors | John Fu, Sunny C. Huang, Jeen-Yuan Miin, Dean Mulla | 2004-08-03 |
| 6745346 | Method for efficiently identifying errant processes in a computer system by the operating system (OS) for error containment and error recovery | Amy O'Donnell, Asit K. Mallick, Koichi Yamada | 2004-06-01 |
| 6711712 | Method and apparatus for error detection/correction | — | 2004-03-23 |
| 6711653 | Flexible mechanism for enforcing coherency among caching structures | Gary N. Hammond | 2004-03-23 |
| 6678837 | Processor control flow monitoring using a signature table for soft error detection | Seongwoo Kim | 2004-01-13 |
| 6675266 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | John H. Crawford, Greg Mathews, Edward T. Grochowski, Chakravarthy Kosaraju | 2004-01-06 |
| 6654909 | Apparatus and method for protecting critical resources against soft errors in high performance microprocessors | John H. Crawford, Chakravarthy Kosaraju, Venkatesh Nagapudi | 2003-11-25 |
| 6640313 | Microprocessor with high-reliability operating mode | — | 2003-10-28 |
| 6636991 | Flexible method for satisfying complex system error handling requirements via error promotion/demotion | — | 2003-10-21 |
| 6631489 | Cache memory and system with partial error detection and correction of MESI protocol | Sunny C. Huang | 2003-10-07 |
| 6625749 | Firmware mechanism for correcting soft errors | — | 2003-09-23 |
| 6625756 | Replay mechanism for soft error recovery | Edward T. Grochowski, William C. Rash | 2003-09-23 |
| 6622260 | System abstraction layer, processor abstraction layer, and operating system error handling | Suresh Marisetty, Mani Ayyar, Bernard Lint | 2003-09-16 |
| 6615366 | Microprocessor with dual execution core operable in high reliability mode | Edward T. Grochowski, William C. Rash, Hang T. Nguyen, Andres Rabago | 2003-09-02 |
| 6567952 | Method and apparatus for set associative cache tag error detection | Gregory S. Mathews | 2003-05-20 |
| 6505318 | Method and apparatus for partial error detection and correction of digital data | Sunny C. Huang | 2003-01-07 |
| 6453427 | Method and apparatus for handling data errors in a computer system | John Fu, James O. Hays, Valentin Anders, Sorin Iacobovici, Alberto J. Munoz +1 more | 2002-09-17 |
| 6438650 | Method and apparatus for processing cache misses | Sunny C. Huang, Jeen-Yuan Miin, Huang Kuang Hu, Stuart E. Sailer, Michael Corwin | 2002-08-20 |
| 6397301 | Preventing access to secure area of a cache | Gary N. Hammond, Kin-Yip Liu | 2002-05-28 |