Issued Patents All Time
Showing 126–150 of 187 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7192856 | Forming dual metal complementary metal oxide semiconductor integrated circuits | Mark L. Doczy, Lawrence Wong, Valery M. Dubin, Jack T. Kavalieros, Suman Datta +2 more | 2007-03-20 |
| 7183184 | Method for making a semiconductor device that includes a metal gate electrode | Mark L. Doczy, Jack T. Kavalieros, Uday Shah, Chris Barns, Robert S. Chau | 2007-02-27 |
| 7176090 | Method for making a semiconductor device that includes a metal gate electrode | Jack T. Kavalieros, Mark L. Doczy, Matthew V. Metz, Suman Datta, Uday Shah +2 more | 2007-02-13 |
| 7170120 | Carbon nanotube energy well (CNEW) field effect transistor | Suman Datta, Marko Radosavljevic, Brian S. Doyle, Jack T. Kavalieros, Amlan Majumdar +1 more | 2007-01-30 |
| 7160767 | Method for making a semiconductor device that includes a metal gate electrode | Jack T. Kavalieros, Uday Shah, Mark L. Doczy, Matthew V. Metz, Robert S. Chau | 2007-01-09 |
| 7160779 | Method for making a semiconductor device having a high-k gate dielectric | Mark L. Doczy, Jack T. Kavalieros, Matthew V. Metz, Suman Datta, Brian S. Doyle +1 more | 2007-01-09 |
| 7157378 | Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode | Chris Barns, Mark L. Doczy, Uday Shah, Jack T. Kavalieros, Matthew V. Metz +3 more | 2007-01-02 |
| 7153784 | Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode | Jack T. Kavalieros, Mark L. Doczy, Uday Shah, Chris Barns, Matthew V. Metz +3 more | 2006-12-26 |
| 7153734 | CMOS device with metal and silicide gate electrodes and a method for making it | Mark L. Doczy, Jack T. Kavalieros, Matthew V. Metz, Chris Barns, Uday Shah +3 more | 2006-12-26 |
| 7148099 | Reducing the dielectric constant of a portion of a gate dielectric | Suman Datta, Jack T. Kavalieros, Mark L. Doczy, Matthew V. Metz, Robert S. Chau | 2006-12-12 |
| 7148548 | Semiconductor device with a high-k gate dielectric and a metal gate electrode | Mark L. Doczy, Jack T. Kavalieros, Matthew V. Metz, Suman Datta, Robert S. Chau | 2006-12-12 |
| 7144783 | Reducing gate dielectric material to form a metal gate electrode extension | Suman Datta, Jack T. Kavalieros, Mark L. Doczy, Matthew V. Metz, Robert S. Chau | 2006-12-05 |
| 7138323 | Planarizing a semiconductor structure to form replacement metal gates | Jack T. Kavalieros, Mark L. Doczy, Uday Shah, Chris Barns, Matthew V. Metz +2 more | 2006-11-21 |
| 7129182 | Method for etching a thin metal layer | Mark L. Doczy, Jack T. Kavalieros, Uday Shah, Matthew V. Metz, Robert S. Chau +1 more | 2006-10-31 |
| 7126199 | Multilayer metal gate electrode | Mark L. Doczy, Jack T. Kavalieros, Chris Barns, Matthew V. Metz, Suman Datta +1 more | 2006-10-24 |
| 7125762 | Compensating the workfunction of a metal gate transistor for abstraction by the gate dielectric layer | Jack T. Kavalieros, Mark L. Doczy, Matthew V. Metz, Suman Datta, Uday Shah +1 more | 2006-10-24 |
| 7119019 | Capping of copper structures in hydrophobic ILD using aqueous electro-less bath | Kevin P. O'Brien | 2006-10-10 |
| 7115479 | Sacrificial annealing layer for a semiconductor device and a method of fabrication | Mark Liu | 2006-10-03 |
| 7105390 | Nonplanar transistors with metal gate electrodes | Brian S. Doyle, Mark L. Doczy, Robert S. Chau | 2006-09-12 |
| 7101761 | Method of fabricating semiconductor devices with replacement, coaxial gate structure | Robert S. Chau, Scott A. Hareland, Matthew V. Metz | 2006-09-05 |
| 7087476 | Using different gate dielectrics with NMOS and PMOS transistors of a complementary metal oxide semiconductor integrated circuit | Matthew V. Metz, Suman Datta, Jack T. Kavalieros, Mark L. Doczy, Robert S. Chau | 2006-08-08 |
| 7084038 | Method for making a semiconductor device having a high-k gate dielectric | Mark L. Doczy, Gilbert Dewey, Suman Datta, Sangwoo Pae, Jack T. Kavalieros +4 more | 2006-08-01 |
| 7078282 | Replacement gate flow facilitating high yield and incorporation of etch stop layers and/or stressed films | Robert S. Chau, Chris Barns, Scott A. Hareland | 2006-07-18 |
| 7078160 | Selective surface exposure, cleans, and conditioning of the germanium film in a Ge photodetector | Bruce A. Block, Uday Shah | 2006-07-18 |
| 7074680 | Method for making a semiconductor device having a high-k gate dielectric | Mark L. Doczy, Gilbert Dewey, Suman Datta, Sangwoo Pae, Jack T. Kavalieros +4 more | 2006-07-11 |