JB

Justin K. Brask

IN Intel: 185 patents #73 of 30,777Top 1%
TR Tahoe Research: 1 patents #81 of 215Top 40%
📍 Portland, OR: #32 of 9,213 inventorsTop 1%
🗺 Oregon: #67 of 28,073 inventorsTop 1%
Overall (All Time): #3,899 of 4,157,543Top 1%
187
Patents All Time

Issued Patents All Time

Showing 76–100 of 187 patents

Patent #TitleCo-InventorsDate
7547637 Methods for patterning a semiconductor film Jack T. Kavalieros, Uday Shah, Suman Datta, Amlan Majumdar, Robert S. Chau +1 more 2009-06-16
7531404 Semiconductor device having a metal gate electrode formed on an annealed high-k gate dielectric layer Sangwoo Pae, Jose Maiz, Gilbert Dewey, Jack T. Kavalieros, Robert S. Chau +1 more 2009-05-12
7531437 Method of forming metal gate electrodes using sacrificial gate electrode material and sacrificial gate dielectric material Brian S. Doyle, Jack T. Kavalieros, Mark L. Doczy, Uday Shah, Robert S. Chau 2009-05-12
7528025 Nonplanar transistors with metal gate electrodes Brian Dovle, Jack Kavalleros, Mark L. Doczy, Uday Shah, Robert S. Chau 2009-05-05
7525160 Multigate device with recessed strain regions Jack T. Kavalieros, Suman Datta, Brian S. Doyle, Robert S. Chau 2009-04-28
7524727 Gate electrode having a capping layer Gilbert Dewey, Mark L. Doczy, Suman Datta, Matthew V. Metz 2009-04-28
7518196 Field effect transistor with narrow bandgap source and drain regions and method of fabrication Robert S. Chau, Suman Datta, Jack T. Kavalieros, Mark L. Doczy, Matthew V. Metz 2009-04-14
7501336 Metal gate device with reduced oxidation of a high-k gate dielectric Brian S. Doyle, Jack T. Kavalieros, Matthew V. Mertz, Mark L. Doczy, Suman Datta +1 more 2009-03-10
7485503 Dielectric interface for group III-V semiconductor device Suman Datta, Mark L. Doczy, James M. Blackwell, Matthew V. Metz, Jack T. Kavalieros +1 more 2009-02-03
7479421 Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby Jack T. Kavalieros, Brian S. Doyle, Uday Shah, Suman Datta, Mark L. Doczy +2 more 2009-01-20
7470972 Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress Jack T. Kavalieros, Mark L. Doczy, Matthew V. Metz, Suman Datta, Brian S. Doyle +7 more 2008-12-30
7465976 Tunneling field effect transistor using angled implants for forming asymmetric source/drain regions Jack T. Kavalieros, Matthew V. Metz, Gilbert Dewey, Ben Jin, Suman Datta +1 more 2008-12-16
7449756 Semiconductor device with a high-k gate dielectric and a metal gate electrode Matthew V. Metz, Suman Datta, Mark L. Doczy, Jack T. Kavalieros, Robert S. Chau 2008-11-11
7442983 Method for making a semiconductor device having a high-k gate dielectric Mark L. Doczy, Gilbert Dewey, Suman Datta, Sangwoo Pae, Jack T. Kavalieros +4 more 2008-10-28
7439113 Forming dual metal complementary metal oxide semiconductor integrated circuits Mark L. Doczy, Mitchell Taylor, Jack T. Kavalieros, Suman Datta, Matthew V. Metz +2 more 2008-10-21
7439571 Method for fabricating metal gate structures Mark L. Doczy, Mark Liu, Jack T. Kavalieros, Matthew V. Metz, Robert S. Chau 2008-10-21
7427541 Carbon nanotube energy well (CNEW) field effect transistor Suman Datta, Marko Radosavljevic, Brian S. Doyle, Jack T. Kavalieros, Amlan Majumdar +1 more 2008-09-23
7427775 Fabricating strained channel epitaxial source/drain transistors Anand S. Murthy, Andrew N. Westmeyer, Boyan Boyanov, Nick Lindert 2008-09-23
7425490 Reducing reactions between polysilicon gate electrodes and high dielectric constant gate dielectrics Jack T. Kavalieros, Mark L. Doczy, Uday Shah, Matthew V. Metz, Suman Datta +1 more 2008-09-16
7425500 Uniform silicide metal on epitaxially grown source and drain regions of three-dimensional transistors Matthew V. Metz, Suman Datta, Mark L. Doczy, Jack T. Kavalieros, Robert S. Chau 2008-09-16
7422936 Facilitating removal of sacrificial layers via implantation to form replacement metal gates Chris Barns, Matt Prince, Mark L. Doczy, Jack T. Kavalieros 2008-09-09
7407868 Chemical thinning of silicon body of an SOI substrate Mohamed Shaheen, Ruitao Zhang 2008-08-05
7407847 Stacked multi-gate transistor design and method of fabrication Brian S. Doyle, Titash Rakshit, Robert S. Chau, Suman Datta, Uday Shah 2008-08-05
7402856 Non-planar microelectronic device having isolation element to mitigate fringe effects and method to fabricate same Jack T. Kavalieros, Brian S. Doyle, Robert S. Chau 2008-07-22
7402875 Lateral undercut of metal gate in SOI device Suman Datta, Jack T. Kavalieros, Brian S. Doyle, Gilbert Dewey, Mark L. Doczy +1 more 2008-07-22