Issued Patents All Time
Showing 26–50 of 123 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11507375 | Hierarchical general register file (GRF) for execution block | Abhishek R. Appu, Altug Koker, Joydeep Ray, Kamal Sinha, Kiran C. Veernapu +7 more | 2022-11-22 |
| 11361496 | Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format | Subramaniam Maiyuran, Shubra Marwaha, Ashutosh Garg, Supratim Pal, Jorge Parra +3 more | 2022-06-14 |
| 11354769 | Page faulting and selective preemption | Altug Koker, Ingo Wald, David Puffer, Subramaniam Maiyuran, Prasoonkumar Surti +4 more | 2022-06-07 |
| 11354768 | Intelligent graphics dispatching mechanism | Balaji Vembu, Murali Ramadoss, Subramaniam Maiyuran, Abhishek R. Appu, Joydeep Ray +4 more | 2022-06-07 |
| 11321799 | Compiler assisted register file write reduction | Chandra Gurram, Gang Chen, Subramaniam Maiyuran, Supratim Pal, Ashutosh Garg +3 more | 2022-05-03 |
| 11314515 | Instructions and logic for vector multiply add with zero skipping | Supratim Pal, Sasikanth Avancha, Ishwar Bhati, Wei-Yu Chen, Dipankar Das +7 more | 2022-04-26 |
| 11294670 | Method and apparatus for performing reduction operations on a plurality of associated data element values | Christopher J. Hughes, Jonathan Pearce, Elmoustapha Ould-Ahmed-Vall, Jorge Parra, Prasoonkumar Surti +2 more | 2022-04-05 |
| 11232536 | Thread prefetch mechanism | Adam T. Lake, Balaji Vembu, Murali Ramadoss, Prasoonkumar Surti, Abhishek R. Appu +8 more | 2022-01-25 |
| 11210265 | Engine to enable high speed context switching via on-die storage | Altug Koker, Prasoonkumar Surti, David Puffer, Subramaniam Maiyuran, Abhishek R. Appu +7 more | 2021-12-28 |
| 11169850 | Hybrid low power homogenous grapics processing units | Abhishek R. Appu, Altug Koker, Balaji Vembu, Joydeep Ray, Kamal Sinha +16 more | 2021-11-09 |
| 11163578 | Systems and methods for reducing register bank conflicts based on a software hint bit causing a hardware thread switch | Buqi Cheng, Wei-Yu Chen, Chandra Gurram, Subramaniam Maiyuran | 2021-11-02 |
| 11042370 | Instruction and logic for systolic dot product with accumulate | Subramaniam Maiyuran, Supratim Pal, Ashutosh Garg, Chandra Gurram, Jorge Parra +10 more | 2021-06-22 |
| 11010163 | Hierarchical general register file (GRF) for execution block | Abhishek R. Appu, Altug Koker, Joydeep Ray, Kamal Sinha, Kiran C. Veernapu +7 more | 2021-05-18 |
| 10990409 | Control flow mechanism for execution of graphics processor instructions using active channel packing | Subramaniam Maiyuran, Supratim Pal, Gang Chen, Ananda V. Kommaraju, Joy Chandra +10 more | 2021-04-27 |
| 10983794 | Register sharing mechanism | Subramaniam Maiyuran, Weiyu Chen, Konrad Trifunovic, Supratim Pal, Chandra Gurram +3 more | 2021-04-20 |
| 10963389 | Instruction prefetch mechanism | Vasileios Porpodas, Subramaniam Maiyuran, Wei-Yu Chen | 2021-03-30 |
| 10891774 | Method and apparatus for profile-guided graphics processing optimizations | Travis T. Schluessler, Michael Apodaca, Peng Guo, William B. Davidson | 2021-01-12 |
| 10877777 | Enabling virtual calls in a SIMD environment | Wei-Yu Chen, Subramaniam Maiyuran | 2020-12-29 |
| 10839478 | Accumulator pooling mechanism | Subramaniam Maiyuran, Wei-Yu Chen, Konrad Trifunovic, Supratim Pal, Chandra Gurram +3 more | 2020-11-17 |
| 10796667 | Register spill/fill using shared local memory space | Joydeep Ray, Altug Koker, Balaji Vembu, Murali Ramadoss, James Valerio +7 more | 2020-10-06 |
| 10776156 | Thread priority mechanism | Altug Koker, Prasoonkumar Surti, Subramaniam Maiyuran, Tomas G. Akenine-Moller, David J. Cowperthwaite +1 more | 2020-09-15 |
| 10754651 | Register bank conflict reduction for multi-threaded processor | Chandra Gurram, Subramaniam Maiyuran, Buqi Cheng, Ashutosh Garg, Wei-Yu Chen | 2020-08-25 |
| 10726517 | Page faulting and selective preemption | Altug Koker, Ingo Wald, David Puffer, Subramaniam Maiyuran, Prasoonkumar Surti +4 more | 2020-07-28 |
| 10726605 | Method and apparatus for efficient processing of derived uniform values in a graphics processor | Travis T. Schluessler, Aleksander Olek Neyman, Thomas Raoux, Bartosz Spitzbarth | 2020-07-28 |
| 10699362 | Divergent control flow for fused EUs | Pratik J. Ashar, Kaiyu Chen, Subramaniam Maiyuran, Brent A. Schwartz, Darin Starkey | 2020-06-30 |