Issued Patents All Time
Showing 76–100 of 123 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9805440 | Method and apparatus to improve performance of chained tasks on a graphics processing unit | Weike Chen, Li-An Tang, Hao Yuan, Samuel Chu-Chiang Hsu | 2017-10-31 |
| 9766892 | Method and apparatus for efficient execution of nested branches on a graphics processor unit | Wei-Yu Chen, Subramaniam Maiyuran | 2017-09-19 |
| 9659343 | Transpose of image data between a linear and a Y-tiled storage format | Yuting Yang, Lei Shen, John R. Hartwig, Kin-Hang Cheung | 2017-05-23 |
| 9465629 | Dynamic linking and loading of post-processing kernels | Xiaoying He, Xuefeng Zhang, Yuenian Yang, Ping-Chen Liu, Hong Jiang +1 more | 2016-10-11 |
| 9372677 | Register liveness analysis for SIMD architectures | Biju George | 2016-06-21 |
| 9183014 | Enabling virtual calls in a SIMD environment | Wei-Yu Chen, Subramaniam Maiyuran | 2015-11-10 |
| 9015687 | Register liveness analysis for SIMD architectures | Biju George | 2015-04-21 |
| 8843913 | Dynamic linking and loading of post-processing kernels | Xiaoying He, Xuefeng Zhang, Yuenian Yang, Ping-Chen Liu, Hong Jiang +1 more | 2014-09-23 |
| 8799876 | Method and apparatus for assigning subroutines | Andrew T. Riffel, Hong Jiang, Bixia Zheng, Lian Tang | 2014-08-05 |
| 8633928 | Reducing the bandwidth of sampler loads in shaders | Wei-Yu Chen | 2014-01-21 |
| 8237726 | Register allocation for message sends in graphics processing pipelines | Wei-Yu Chen | 2012-08-07 |
| 8205200 | Compiler-based scheduling optimization hints for user-level threads | Shih-wei Liao, Ryan Rakvic, Richard Hankins, Hong Wang, Gansha Wu +6 more | 2012-06-19 |
| 7941791 | Programming environment for heterogeneous processor resource integration | Perry Wang, Jamison D. Collins, Gautham Chinya, Hong Jiang, Hong Wang +1 more | 2011-05-10 |
| 7873943 | Inserting stack clearing code in conservative garbage collection | Gansha Wu, Xin Zhou, Peng Guo, Jinzhan Peng, Zhiwei Ying | 2011-01-18 |
| 7793278 | Systems and methods for affine-partitioning programs onto multiple processing units | Zhao Hui Du, Shih-wei Liao, Gansha Wu | 2010-09-07 |
| 7788653 | Apparatus and methods for performing generational escape analysis in managed runtime environments | Xiaohua Shi, Gansha Wu | 2010-08-31 |
| 7757222 | Generating efficient parallel code using partitioning, coalescing, and degenerative loop and guard removal | Shih-wei Liao, Zhao Hui Du, Bu Qi Cheng, Gansha Wu | 2010-07-13 |
| 7689980 | Splitting the computation space to optimize parallel code | Zhao Hui Du, Shih-wei Liao, Gansha Wu | 2010-03-30 |
| 7689971 | Method and apparatus for referencing thread local variables with stack address mapping | Jinzhan Peng, Xiaohua Shi, Gansha Wu | 2010-03-30 |
| 7688232 | Optimal selection of compression entries for compressing program instructions | Chu-Cheow Lim, Bixia Zheng, Hong Jiang | 2010-03-30 |
| 7603663 | Apparatus and methods for restoring synchronization to object-oriented software applications in managed runtime environments | Gansha Wu, Xiaohua Shi | 2009-10-13 |
| 7469404 | Bank assignment for partitioned register banks | Junchao Zhang, Dz-ching Ju, Ruiqi Lian, Zhaoqing Zhang | 2008-12-23 |
| 7424596 | Code interpretation using stack state information | Gansha Wu, Jinzhan Peng | 2008-09-09 |
| 7386686 | Inlining with stack trace cache-based dynamic profiling | Gansha Wu | 2008-06-10 |
| 7367022 | Methods and apparatus for optimizing the operating speed and size of a computer program | Ali-Reza Adl-Tabatabai, Tatiana Shpeisman | 2008-04-29 |