Issued Patents All Time
Showing 26–48 of 48 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10503517 | Method for booting a heterogeneous system and presenting a symmetric core view | Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more | 2019-12-10 |
| 10489309 | Memory protection key architecture with independent user and supervisor domains | Gilbert Neiger, Rajesh M. Sankaran, Andrew V. Anderson, Subramanya R. Dulloor, Werner E. L. Haas +1 more | 2019-11-26 |
| 10311252 | Technologies for protecting dynamically generated managed code with protection domains | Xiaoning Li, Mingqiu Sun, Ravi L. Sahita | 2019-06-04 |
| 10296459 | Remote atomic operations in multi-socket systems | Doddaballapur N. Jayasimha, Samantika S. Sury, Christopher J. Hughes, Jonas Svennebring, Yen-Cheng Liu +1 more | 2019-05-21 |
| 10185566 | Migrating tasks between asymmetric computing elements of a multi-core processor | Alon Naveh, Yuval Yosef, Eliezer Weissmann, Anil Aggarwal, Efraim Rotem +7 more | 2019-01-22 |
| 10162687 | Selective migration of workloads between heterogeneous compute elements based on evaluation of migration performance benefit and available energy and thermal budgets | Eugene Gorbatov, Alon Naveh, Inder M. Sodhi, Ganapati Srinivasa, Eliezer Weissmann +6 more | 2018-12-25 |
| 10126985 | Application driven hardware cache management | Subramanya R. Dulloor, Rajesh M. Sankaran, Christopher J. Hughes, Jong Soo Park, Sheng Li | 2018-11-13 |
| 10037288 | Memory protection at a thread level for a memory protection key architecture | Francesc Guim, Andrea Pellegrini, Rajesh M. Sankaran | 2018-07-31 |
| 9910611 | Access control for memory protection key architecture | Ravi L. Sahita | 2018-03-06 |
| 9727345 | Method for booting a heterogeneous system and presenting a symmetric core view | Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more | 2017-08-08 |
| 9720730 | Providing an asymmetric multicore processor system transparently to an operating system | Boris Ginzburg, Ilya Osadchiy, Ronny Ronen, Eliezer Weissmann, Michael Mishaeli +13 more | 2017-08-01 |
| 9672046 | Apparatus and method for intelligently powering heterogeneous processor components | Dheeraj Subbareddy, Ganapati Srinivasa, Eugene Gorbatov, Scott D. Hahn, Paul Brett +1 more | 2017-06-06 |
| 9639372 | Apparatus and method for heterogeneous processors mapping to virtual cores | Paolo Narvaez, Ganapati Srinivasa, Eugene Gorbatov, Dheeraj Subbareddy, Mishali Naik +11 more | 2017-05-02 |
| 9448829 | Hetergeneous processor apparatus and method | Paolo Narvaez, Ganapati Srinivasa, Eugene Gorbatov, Dheeraj Subbareddy, Mishali Naik +10 more | 2016-09-20 |
| 9430296 | System partitioning to present software as platform level functionality via inter-partition bridge including reversible mode logic to switch between initialization, configuration, and execution mode | Stephen J. Tolopka, John I. Garney, Yasser Rasheed, Ulhas Warrier, Matthew E. Hoekstra | 2016-08-30 |
| 9329900 | Hetergeneous processor apparatus and method | Paolo Narvaez, Ganapati Srinivasa, Eugene Gorbatov, Dheeraj Subbareddy, Mishali Naik +11 more | 2016-05-03 |
| 8683158 | Steering system management code region accesses | Martin G. Dixon, Camron Rust, Hermann W. Gartler, Frank Binns | 2014-03-25 |
| 8479208 | System partitioning to present software as platform level functionality including mode logic to maintain and enforce partitioning in first and configure partitioning in second mode | Stephen J. Tolopka, John I. Garney, Yasser Rasheed, Ulhas Warrier, Matthew E. Hoekstra | 2013-07-02 |
| 7519792 | Memory region access management | — | 2009-04-14 |
| 7516313 | Predicting contention in a processor | Bratin Saha, Matthew C. Merten, Sebastien Hily, Per Hammarlund | 2009-04-07 |
| 7370160 | Virtualizing memory type | Gilbert Neiger, Steven M. Bennett, Andrew V. Anderson, Dion Rodgers, Richard Uhlig +3 more | 2008-05-06 |
| 7363474 | Method and apparatus for suspending execution of a thread until a specified memory access occurs | Dion Rodgers, Deborah T. Marr, David L. Hill, Shiv Kaushik, James B. Crossland | 2008-04-22 |
| 7127561 | Coherency techniques for suspending execution of a thread until a specified memory access occurs | David L. Hill, Deborah T. Marr, Dion Rodgers, Shiv Kaushik, James B. Crossland | 2006-10-24 |