Issued Patents All Time
Showing 301–325 of 462 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9570571 | Gate stack integrated metal resistors | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2017-02-14 |
| 9570591 | Forming semiconductor device with close ground rules | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2017-02-14 |
| 9570450 | Hybrid logic and SRAM contacts | Kangguo Cheng, Ali Khakifirooz | 2017-02-14 |
| 9570574 | Recessed metal liner contact with copper fill | Praneet Adusumilli, Huiming Bu, Zuoguang Liu | 2017-02-14 |
| 9570355 | Methods for contact formation for 10 nanometers and beyond with minimal mask counts | — | 2017-02-14 |
| 9570298 | Localized elastic strain relaxed buffer | Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek | 2017-02-14 |
| 9570444 | CMOS transistors with identical active semiconductor region shapes | Kangguo Cheng, Ali Khakifirooz | 2017-02-14 |
| 9564428 | Forming metal-insulator-metal capacitor | Kangguo Cheng | 2017-02-07 |
| 9564437 | Method and structure for forming FinFET CMOS with dual doped STI regions | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2017-02-07 |
| 9559191 | Punch through stopper in bulk finFET device | Zuoguang Liu, Tenko Yamashita, Chun-Chen Yeh | 2017-01-31 |
| 9559000 | Hybrid logic and SRAM contacts | Kangguo Cheng, Ali Khakifirooz | 2017-01-31 |
| 9559014 | Self-aligned punch through stopper liner for bulk FinFET | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2017-01-31 |
| 9553088 | Forming semiconductor device with close ground rules | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2017-01-24 |
| 9553032 | Fin field effect transistor including asymmetric raised active regions | Kangguo Cheng, Ali Khakifirooz | 2017-01-24 |
| 9548306 | Method of forming a complementary metal oxide semiconductor structure with N-type and P-type field effect transistors having symmetric source/drain junctions and optional dual silicides | Andres Bryant, Tenko Yamashita | 2017-01-17 |
| 9548250 | Semiconductor device including self-aligned gate structure and improved gate spacer topography | Tenko Yamashita | 2017-01-17 |
| 9548379 | Asymmetric multi-gate FinFET | Andres Bryant, Huiming Bu, Sivananda K. Kanakasabapathy, Tenko Yamashita | 2017-01-17 |
| 9543435 | Asymmetric multi-gate finFET | Andres Bryant, Huiming Bu, Sivananda K. Kanakasabapathy, Tenko Yamashita | 2017-01-10 |
| 9536979 | FinFET with reduced capacitance | Kangguo Cheng, Ali Khakifirooz, Charles W. Koburger, III | 2017-01-03 |
| 9537015 | Localized fin width scaling using a hydrogen anneal | Shogo Mochizuki, Tenko Yamashita, Chun-Chen Yeh | 2017-01-03 |
| 9530698 | Method and structure for forming FinFET CMOS with dual doped STI regions | Kangguo Cheng, Theodorus E. Standaert, Junli Wang | 2016-12-27 |
| 9525048 | Symmetrical extension junction formation with low-k spacer and dual epitaxial process in finFET device | Zuoguang Liu, Tenko Yamashita, Chun-Chen Yeh | 2016-12-20 |
| 9524882 | Contact structure and extension formation for III-V nFET | Alexander Reznicek | 2016-12-20 |
| 9520394 | Contact structure and extension formation for III-V nFET | Alexander Reznicek | 2016-12-13 |
| 9514998 | Polysilicon resistor formation in silicon-on-insulator replacement metal gate finFET processes | Huiming Bu, Tenko Yamashita | 2016-12-06 |