Issued Patents All Time
Showing 126–150 of 286 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7352030 | Semiconductor devices with buried isolation regions | Mark C. Hakey, Steven J. Holmes, David V. Horak, Charles W. Koburger, III | 2008-04-01 |
| 7351648 | Methods for forming uniform lithographic features | Mark C. Hakey, Steven J. Holmes, David V. Horak, Charles W. Koburger, III, Chung H. Lam | 2008-04-01 |
| 7348634 | Shallow trench isolation formation | Mark C. Hakey, Steven J. Holmes, David V. Horak, Charles W. Koburger, III | 2008-03-25 |
| 7348610 | Multiple layer and crystal plane orientation semiconductor substrate | David V. Horak, Charles W. Koburger, III, Leathen Shi | 2008-03-25 |
| 7345370 | Wiring patterns formed by selective metal plating | Mark C. Hakey, Steven J. Holmes, David V. Horak, Charles W. Koburger, III | 2008-03-18 |
| 7335930 | Borderless contact structures | David V. Horak, Charles W. Koburger, III | 2008-02-26 |
| 7329567 | Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage | Mark C. Hakey, Steven J. Holmes, David V. Horak, Peter H. Mitchell, Larry Nesbit | 2008-02-12 |
| 7329613 | Structure and method for forming semiconductor wiring levels using atomic layer deposition | Steven J. Holmes, David V. Horak, Charles W. Koburger, III | 2008-02-12 |
| 7323370 | SOI device with reduced junction capacitance | — | 2008-01-29 |
| 7288814 | Selective post-doping of gate structures by means of selective oxide growth | Anthony I. Chou, Steven J. Holmes | 2007-10-30 |
| 7282423 | Method of forming fet with T-shaped gate | Mark C. Hakey, Steven J. Holmes, David V. Horak, Edward J. Nowak | 2007-10-16 |
| 7276768 | Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures | Robert J. Gauthier, Jr., David V. Horak, Charles W. Koburger, III, Jack A. Mandelman, William R. Tonti | 2007-10-02 |
| 7271878 | Wafer cell for immersion lithography | Mark C. Hakey, David Vaclav Horal, Charles W. Koburger, III, Peter H. Mitchell | 2007-09-18 |
| 7271444 | Wrap-around gate field effect transistor | Mark C. Hakey, David V. Horak, Charles W. Koburger, III, Peter H. Mitchell | 2007-09-18 |
| 7271079 | Method of doping a gate electrode of a field effect transistor | Mark C. Hakey, Steven J. Holmes, David V. Horak, Charles W. Koburger, III | 2007-09-18 |
| 7268400 | Triple-well CMOS devices with increased latch-up immunity and methods of fabricating same | Delbert R. Cecchi, Jack A. Mandelman | 2007-09-11 |
| 7268028 | Well isolation trenches (WIT) for CMOS devices | Mark C. Hakey, David V. Horak, Charles W. Koburger, III, Jack A. Mandelman, William R. Tonti | 2007-09-11 |
| 7264415 | Methods of forming alternating phase shift masks having improved phase-shift tolerance | Mark C. Hakey, Steven J. Holmes, David V. Horak, Charles W. Koburger, III, Peter H. Mitchell +1 more | 2007-09-04 |
| 7265013 | Sidewall image transfer (SIT) technologies | Mark C. Hakey, Steven J. Holmes, David V. Horak, Charles W. Koburger, III, Kirk D. Peterson | 2007-09-04 |
| 7256114 | Process for oxide cap formation in semiconductor manufacturing | Steven J. Holmes, Mark C. Hakey, David V. Horak, Charles W. Koburger, III, Larry Nesbit | 2007-08-14 |
| 7250347 | Double-gate FETs (Field Effect Transistors) | Mark C. Hakey, Steven J. Holmes, David V. Horak, Charles W. Koburger, III, Peter H. Mitchell +1 more | 2007-07-31 |
| 7250351 | Enhanced silicon-on-insulator (SOI) transistors and methods of making enhanced SOI transistors | Carl Radens, William R. Tonti, Richard Q. Williams | 2007-07-31 |
| 7233063 | Borderless contact structures | David V. Horak, Charles W. Koburger, III | 2007-06-19 |
| 7233071 | Low-k dielectric layer based upon carbon nanostructures | Mark C. Hakey, Steven J. Holmes, David V. Horak, Charles W. Koburger, III | 2007-06-19 |
| 7230681 | Method and apparatus for immersion lithography | Steven J. Holmes, Mark C. Hakey, Daniel A. Corliss, David V. Horak, Charles W. Koburger, III | 2007-06-12 |