Issued Patents All Time
Showing 76–100 of 207 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10134760 | FinFETs with various fin height | Kangguo Cheng, Xin Miao, Balasubramanian Pranatharthiharan | 2018-11-20 |
| 10128377 | Independent gate FinFET with backside gate contact | Joshua M. Rubin, Tenko Yamashita | 2018-11-13 |
| 10128347 | Gate-all-around field effect transistor having multiple threshold voltages | Ruqiang Bao, Michael A. Guillorn, Robert R. Robison, Reinaldo Vega, Tenko Yamashita | 2018-11-13 |
| 10121877 | Vertical field effect transistor with metallic bottom region | Joshua M. Rubin, Tenko Yamashita | 2018-11-06 |
| 10109639 | Lateral non-volatile storage cell | John Bradley Deforge, John J. Ellis-Monaghan, Kirk D. Peterson | 2018-10-23 |
| 10090330 | Structure and method for fully depleted silicon on insulator structure for threshold voltage modification | John J. Ellis-Monaghan, Kirk D. Peterson | 2018-10-02 |
| 10038083 | Semiconductor device with low band-to-band tunneling | Nicolas Degors | 2018-07-31 |
| 10002800 | Prevention of charging damage in full-depletion devices | — | 2018-06-19 |
| 9997539 | Fully-depleted silicon-on-insulator transistors | Horacio Josue Mendez | 2018-06-12 |
| 9997607 | Mirrored contact CMOS with self-aligned source, drain, and back-gate | Joshua M. Rubin, Tenko Yamashita | 2018-06-12 |
| 9991339 | Bulk to silicon on insulator device | Joshua M. Rubin, Tenko Yamashita | 2018-06-05 |
| 9990459 | Checking wafer-level integrated designs for antenna rule compliance | Larry Wissel | 2018-06-05 |
| 9985099 | Semiconductor device with low band-to-band tunneling | Nicolas Degors | 2018-05-29 |
| 9984883 | Devices with multiple threshold voltages formed on a single wafer using strain in the high-k layer | Takashi Ando, Mohit Bajaj, Rajan K. Pandey, Rajesh Sathiyanarayanan | 2018-05-29 |
| 9978871 | Bulk to silicon on insulator device | Joshua M. Rubin, Tenko Yamashita | 2018-05-22 |
| 9972497 | Devices with multiple threshold voltages formed on a single wafer using strain in the high-k layer | Takashi Ando, Mohit Bajaj, Rajan K. Pandey, Rajesh Sathiyanarayanan | 2018-05-15 |
| 9947743 | Structures and methods for long-channel devices in nanosheet technology | Bruce B. Doris | 2018-04-17 |
| 9947664 | Semiconductor device and method of forming the semiconductor device | Brent A. Anderson, Shawn P. Fetterolf | 2018-04-17 |
| 9947593 | Extra gate device for nanosheet | Bruce B. Doris, Junli Wang | 2018-04-17 |
| 9941300 | Structure and method for fully depleted silicon on insulator structure for threshold voltage modification | John J. Ellis-Monaghan, Kirk D. Peterson | 2018-04-10 |
| 9929145 | Bipolar transistor compatible with vertical FET fabrication | Brent A. Anderson, Kangguo Cheng, Tak H. Ning | 2018-03-27 |
| 9881925 | Mirror contact capacitor | Joshua M. Rubin, Tenko Yamashita | 2018-01-30 |
| 9859172 | Bipolar transistor compatible with vertical FET fabrication | Brent A. Anderson, Kangguo Cheng, Tak H. Ning | 2018-01-02 |
| 9853127 | Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer process | Brent A. Anderson, Huiming Bu, Fee Li Lie, Junli Wang | 2017-12-26 |
| 9818650 | Extra gate device for nanosheet | Bruce B. Doris, Junli Wang | 2017-11-14 |