Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11508612 | Semiconductor on insulator structure comprising a buried high resistivity layer | Igor Peidous, Andrew M. Jones, Srikanth Kommu | 2022-11-22 |
| 10622247 | Semiconductor on insulator structure comprising a buried high resistivity layer | Igor Peidous, Andrew M. Jones, Srikanth Kommu | 2020-04-14 |
| 10381261 | Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers | Igor Peidous, Jeffrey L. Libbert, Srikanth Kommu, Andrew M. Jones, Samuel Christopher Pratt +2 more | 2019-08-13 |
| 10381260 | Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers | Igor Peidous, Jeffrey L. Libbert, Srikanth Kommu, Andrew M. Jones, Samuel Christopher Pratt +2 more | 2019-08-13 |
| 10163934 | Fully-depleted silicon-on-insulator transistors | Terence B. Hook | 2018-12-25 |
| 9997539 | Fully-depleted silicon-on-insulator transistors | Terence B. Hook | 2018-06-12 |
| 9520329 | Fully-depleted silicon-on-insulator transistors | Terence B. Hook | 2016-12-13 |
| 9484270 | Fully-depleted silicon-on-insulator transistors | Terence B. Hook | 2016-11-01 |
| 5514892 | Electrostatic discharge protection device | Roger S. Countryman, Jr., Gianfranco Gerosa | 1996-05-07 |