SL

Stephen E. Luce

IBM: 64 patents #1,202 of 70,183Top 2%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
GU Globalfoundries U.S.: 1 patents #22 of 211Top 15%
📍 Underhill, VT: #8 of 98 inventorsTop 9%
🗺 Vermont: #87 of 4,968 inventorsTop 2%
Overall (All Time): #31,976 of 4,157,543Top 1%
67
Patents All Time

Issued Patents All Time

Showing 26–50 of 67 patents

Patent #TitleCo-InventorsDate
8421126 Double-sided integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Paul D. Kartschoke +1 more 2013-04-16
8284017 Structure having substantially parallel resistor material lengths Mark C. Hakey, James S. Nakos 2012-10-09
8236683 Conductor structure including manganese oxide capping layer Jeffrey P. Gambino 2012-08-07
8232190 Three dimensional vertical E-fuse structures and methods of manufacturing the same Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Anthony K. Stamper 2012-07-31
8211728 Horizontal micro-electro-mechanical-system switch Anthony K. Stamper 2012-07-03
8111129 Resistor and design structure having substantially parallel resistor material lengths Mark C. Hakey, James S. Nakos 2012-02-07
8044764 Resistor and design structure having resistor material length with sub-lithographic width Mark C. Hakey, James S. Nakos 2011-10-25
8026606 Interconnect layers without electromigration Thomas L. McDevitt, Anthony K. Stamper 2011-09-27
8013342 Double-sided integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Paul D. Kartschoke +1 more 2011-09-06
8004289 Wafer-to-wafer alignments Thomas Joseph Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Edmund J. Sprogis 2011-08-23
7989312 Double-sided integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Paul D. Kartschoke +1 more 2011-08-02
7977200 Charge breakdown avoidance for MIM elements in SOI base technology and method William F. Clark, Jr. 2011-07-12
7884475 Conductor structure including manganese oxide capping layer Jeffrey P. Gambino 2011-02-08
7824961 Stacked imager package James W. Adkisson, Jeffrey P. Gambino, Mark D. Jaffe, Robert K. Leidy, Richard J. Rassel +1 more 2010-11-02
7781781 CMOS imager array with recessed dielectric James W. Adkisson, Jeffrey P. Gambino, Zhong-Xiang He, Mark D. Jaffe, Robert K. Leidy +2 more 2010-08-24
7670927 Double-sided integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Paul D. Kartschoke +1 more 2010-03-02
7585758 Interconnect layers without electromigration Thomas L. McDevitt, Anthony K. Stamper 2009-09-08
7541679 Exposed pore sealing post patterning Edward C. Cooney, III, John A. Fitzsimmons, Jeffrey P. Gambino, Thomas L. McDevitt, Lee M. Nicholson +1 more 2009-06-02
7521798 Stacked imager package James W. Adkisson, Jeffrey P. Gambino, Mark D. Jaffe, Robert K. Leidy, Richard J. Rassel +1 more 2009-04-21
7521336 Crack stop for low K dielectrics Timothy H. Daubenspeck, Jeffrey P. Gambino, Thomas L. McDevitt, William T. Motsiff, Mark J. Pouliot +1 more 2009-04-21
7474104 Wafer-to-wafer alignments Thomas Joseph Dalton, Jeffrey P. Gambino, Mark David Jaffee, Edmund J. Sprogis 2009-01-06
7361989 Stacked imager package James W. Adkisson, Jeffrey P. Gambino, Mark D. Jaffe, Robert K. Leidy, Richard J. Rassel +1 more 2008-04-22
7335577 Crack stop for low K dielectrics Timothy H. Daubenspeck, Jeffrey P. Gambino, Thomas L. McDevitt, William T. Motsiff, Mark J. Pouliot +1 more 2008-02-26
7193423 Wafer-to-wafer alignments Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Edmund J. Sprogis 2007-03-20
7183656 Bilayer aluminum last metal for interconnects and wirebond pads Thomas L. McDevitt, Anthony K. Stamper 2007-02-27