Issued Patents All Time
Showing 201–225 of 581 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10361131 | Stacked field-effect transistors (FETs) with shared and non-shared gates | Takashi Ando, Choonghyun Lee, Alexander Reznicek, Jingyun Zhang | 2019-07-23 |
| 10361199 | Vertical transistor transmission gate with adjacent NFET and PFET | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2019-07-23 |
| 10361301 | Fabrication of vertical fin transistor with multiple threshold voltages | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2019-07-23 |
| 10347539 | Germanium dual-fin field effect transistor | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2019-07-09 |
| 10332972 | Single column compound semiconductor bipolar junction transistor fabricated on III-V compound semiconductor surface | Karthik Balakrishnan, Tak H. Ning, Alexander Reznicek | 2019-06-25 |
| 10332809 | Method and structure to introduce strain in stack nanosheet field effect transistor | Takashi Ando, Jingyun Zhang, Choonghyun Lee, Alexander Reznicek | 2019-06-25 |
| 10319846 | Multiple work function nanosheet field-effect transistors with differential interfacial layer thickness | Takashi Ando, Choonghyun Lee, Jingyun Zhang | 2019-06-11 |
| 10319645 | Method for forming a semiconductor structure containing high mobility semiconductor channel materials | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2019-06-11 |
| 10319826 | Replacement metal gate stack with oxygen and nitrogen scavenging layers | Takashi Ando, Choonghyun Lee | 2019-06-11 |
| 10312337 | Fabrication of nano-sheet transistors with different threshold voltages | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2019-06-04 |
| 10312259 | Channel SiGe devices with multiple threshold voltages on hybrid oriented substrates, and methods of manufacturing same | Bruce B. Doris, Lisa F. Edge, Alexander Reznicek | 2019-06-04 |
| 10312234 | Diode connected vertical transistor | Karthik Balakrishnan, Alexander Reznicek | 2019-06-04 |
| 10304844 | Stacked FinFET EEPROM | Karthik Balakrishnan, Tak H. Ning, Alexander Reznicek | 2019-05-28 |
| 10304823 | Vertical field effect transistor (VFET) programmable complementary metal oxide semiconductor inverter | Karthik Balakrishnan, Tak H. Ning, Alexander Reznicek | 2019-05-28 |
| 10297749 | High density resistive random access memory integrated on complementary metal oxide semiconductor | Takashi Ando | 2019-05-21 |
| 10297686 | Tapered vertical FET having III-V channel | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2019-05-21 |
| 10297512 | Method of making thin SRAM cell having vertical transistors | Karthik Balakrishnan, Michael A. Guillorn, Alexander Reznicek | 2019-05-21 |
| 10290747 | MIS capacitor for finned semiconductor structure | Keith E. Fogel, Shogo Mochizuki, Alexander Reznicek | 2019-05-14 |
| 10283601 | Strained silicon germanium fin with block source/drain epitaxy and improved overlay capacitance | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2019-05-07 |
| 10276714 | Twin gate field effect diode | Karthik Balakrishnan, Bahman Hekmatshoartabari, Alexander Reznicek | 2019-04-30 |
| 10269869 | High-density field-enhanced ReRAM integrated with vertical transistors | Takashi Ando, Alexander Reznicek | 2019-04-23 |
| 10256327 | Forming a fin using double trench epitaxy | Veeraraghavan S. Basker, Shogo Mochizuki, Alexander Reznicek | 2019-04-09 |
| 10256230 | Co-fabrication of vertical diodes and fin field effect transistors on the same substrate | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2019-04-09 |
| 10249630 | Structure featuring ferroelectric capacitance in interconnect level for steep sub-threshold complementary metal oxide semiconductor transistors | Takashi Ando, Karthik Balakrishnan, Alexander Reznicek | 2019-04-02 |
| 10243065 | Method of manufacturing SOI lateral Si-emitter SiGe base HBT | Tak H. Ning, Alexander Reznicek | 2019-03-26 |