Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7777302 | Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structure | Joseph R. Greco, Richard S. Kontra, Emily Lanning | 2010-08-17 |
| 7696034 | Methods of base formation in a BiCOMS process | Marwan H. Khater, Qizhi Liu, Randy W. Mann, Robert J. Purtell, Beth Ann Rainey +2 more | 2010-04-13 |
| 7625792 | Method of base formation in a BiCMOS process | Alvin J. Joseph, Qizhi Liu, Bradley A. Orner | 2009-12-01 |
| 7538004 | Method of fabrication for SiGe heterojunction bipolar transistor (HBT) | Alvin J. Joseph, Rajendran Krishnasamy, Xuefeng Liu | 2009-05-26 |
| 7491985 | Method of collector formation in BiCMOS technology | Peter B. Gray, Alvin J. Joseph, Qizhi Liu | 2009-02-17 |
| 7390721 | Methods of base formation in a BiCMOS process | Marwan H. Khater, Qizhi Liu, Randy W. Mann, Robert J. Purtell, BethAnn Rainey +2 more | 2008-06-24 |
| 7317215 | SiGe heterojunction bipolar transistor (HBT) | Alvin J. Joseph, Rajendran Krishnasamy, Xuefeng Liu | 2008-01-08 |
| 7247924 | Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures | Joseph R. Greco, Richard S. Kontra, Emily Lanning | 2007-07-24 |
| 7002190 | Method of collector formation in BiCMOS technology | Peter B. Gray, Alvin J. Joseph, Qizhi Liu | 2006-02-21 |
| 6967167 | Silicon dioxide removing method | Alvin J. Joseph, Xuefeng Liu, James S. Nakos, James J. Quinlivan | 2005-11-22 |
| 6965133 | Method of base formation in a BiCMOS process | Marwan H. Khater, Qizhi Liu, Randy W. Mann, Robert J. Purtell, BethAnn Rainey +2 more | 2005-11-15 |
| 6936509 | STI pull-down to control SiGe facet growth | Douglas D. Coolbaugh, Mark D. Dupuis, Matthew D. Gallagher, Brett A. Philips | 2005-08-30 |
| 6911681 | Method of base formation in a BiCMOS process | Alvin J. Joseph, Qizhi Liu, Bradley A. Orner | 2005-06-28 |
| 6682992 | Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures | Joseph R. Greco, Richard S. Kontra, Emily Lanning | 2004-01-27 |
| 6674102 | Sti pull-down to control SiGe facet growth | Douglas D. Coolbaugh, Mark D. Dupuis, Matthew D. Gallagher, Brett A. Philips | 2004-01-06 |
| 6660664 | Structure and method for formation of a blocked silicide resistor | James W. Adkisson, Arne Ballantine, Matthew D. Gallagher, Jeffrey D. Gilbert, Shwu-Jen Jeng +6 more | 2003-12-09 |
| 6541336 | Method of fabricating a bipolar transistor having a realigned emitter | Marc W. Cantell, Rajesh Chopdekar | 2003-04-01 |
| 6448124 | Method for epitaxial bipolar BiCMOS | Douglas D. Coolbaugh, James S. Dunn, Peter B. Gray, David L. Harame, Kathryn T. Schonenberg +2 more | 2002-09-10 |
| 6420747 | MOSCAP design for improved reliability | Douglas D. Coolbaugh, James S. Dunn, Douglas B. Hershberger, Stephen A. St. Onge | 2002-07-16 |
| 6399976 | Shrink-wrap collar for DRAM deep trenches | Howard S. Landis, Son V. Nguyen | 2002-06-04 |
| 6258695 | Dislocation suppression by carbon incorporation | James S. Dunn, Stephen A. St. Onge | 2001-07-10 |
| 6069049 | Shrink-wrap collar from DRAM deep trenches | Howard S. Landis, Son V. Nguyen | 2000-05-30 |
| 5635419 | Porous silicon trench and capacitor structures | Donald M. Kenney | 1997-06-03 |
| 5508542 | Porous silicon trench and capacitor structures | Donald M. Kenney | 1996-04-16 |
| 5356837 | Method of making epitaxial cobalt silicide using a thin metal underlayer | Thomas J. Licata, Herbert L. Ho, James G. Ryan | 1994-10-18 |