Issued Patents All Time
Showing 751–775 of 836 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8521961 | Checkpointing in speculative versioning caches | Alexandre E. Eichenberger, Alan Gara, Martin Ohmacht | 2013-08-27 |
| 8495607 | Performing aggressive code optimization with an ability to rollback changes made by the aggressive optimizations | — | 2013-07-23 |
| 8468531 | Method and apparatus for efficient inter-thread synchronization for helper threads | John Kevin Patrick O'Brien, Valentina Salapura, Zehra N. Sura | 2013-06-18 |
| 8458677 | Generating code adapted for interlinking legacy scalar code and extended vector code | — | 2013-06-04 |
| 8458684 | Insertion of operation-and-indicate instructions for optimized SIMD code | Alexandre E. Eichenberger, Alan Gara | 2013-06-04 |
| 8458442 | Method and structure of using SIMD vector architectures to implement matrix multiplication | Alexandre E. Eichenberger, John A. Gunnels, Fred Gehrung Gustavson, Brett Olsson | 2013-06-04 |
| 8453161 | Method and apparatus for efficient helper thread state initialization using inter-thread register copy | John Kevin Patrick O'Brien, Valentina Salapura, Zehra N. Sura | 2013-05-28 |
| 8423983 | Generating and executing programs for a floating point single instruction multiple data instruction set architecture | — | 2013-04-16 |
| 8327344 | Array reference safety analysis in the presence of loops with conditional control flow | — | 2012-12-04 |
| 8312424 | Methods for generating code for an architecture encoding an extended register specification | Robert K. Montoye, Brett Olsson, John-David Wellman | 2012-11-13 |
| 8312219 | Hybrid caching techniques and garbage collection using hybrid caching techniques | Chen-Yong Cher | 2012-11-13 |
| 8255884 | Optimized scalar promotion with load and splat SIMD instructions | Alexandre E. Eichenberger, John A. Gunnels | 2012-08-28 |
| 8255669 | Method and apparatus for thread priority control in a multi-threaded processor based upon branch issue information including branch confidence information | Robert Alan Philhower, Raymond Cheung Yeung | 2012-08-28 |
| 8214808 | System and method for speculative thread assist in a heterogeneous processing environment | Michael Norman Day, John Kevin Patrick O'Brien, Kathryn M. O'Brien | 2012-07-03 |
| 8201159 | Method and apparatus for generating data parallel select operations in a pervasively data parallel system | — | 2012-06-12 |
| 8196127 | Pervasively data parallel information handling system and methodology for generating data parallel select operations | — | 2012-06-05 |
| 8188761 | Soft error detection for latches | Bruce M. Fleischer | 2012-05-29 |
| 8166281 | Implementing instruction set architectures with non-contiguous register file specifiers | Robert K. Montoye, Brett Olsson, John-David Wellman | 2012-04-24 |
| 8166279 | Method for predictive decoding of a load tagged pointer instruction | Bartholomew Blaner | 2012-04-24 |
| 8156310 | Method and apparatus for data stream alignment support | Alexandre E. Eichenberger, John-David Wellman, Peng Wu | 2012-04-10 |
| 8151092 | Control signal memoization in a multiple instruction issue microprocessor | Erik R. Altman, Jude A. Rivers, Sumedh W. Sathaye, John-David Wellman, Victor Zyuban | 2012-04-03 |
| 8132169 | System and method for dynamically partitioning an application across multiple processing elements in a heterogeneous processing environment | John Kevin Patrick O'Brien, Kathryn M. O'Brien | 2012-03-06 |
| 8127078 | High performance unaligned cache access | Valentina Salapura | 2012-02-28 |
| 8108846 | Compiling scalar code for a single instruction multiple data (SIMD) execution engine | — | 2012-01-31 |
| 8095777 | Structure for predictive decoding | Bartholomew Blaner | 2012-01-10 |