Issued Patents All Time
Showing 1–25 of 77 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11625286 | Transactional lock elision with delayed lock checking | Maged M. Michael, Marcel Mitran, Kai-Ting Amy Wang | 2023-04-11 |
| 11288194 | Global virtual address space consistency model | Charles Ray Johns, James A. Kahle, Changhoan Kim, Jose R. Brunheroto, Constantinos Evangelinos +4 more | 2022-03-29 |
| 10707755 | Integrated circuits with programmable gate timing signal generation for power converters and apparatus comprising the same | Xin Zhang, Todd E. Takken, Chung-shiang Wu, Robert M. Senger, Rudolf A. Haring | 2020-07-07 |
| 10275290 | Transactional lock elision with delayed lock checking | Maged M. Michael, Marcel Mitran, Kai-Ting Amy Wang | 2019-04-30 |
| 10140179 | Combined group ECC protection and subgroup parity protection | Alan Gara, Dong Chen, Philip Heidelberger | 2018-11-27 |
| 9971713 | Multi-petascale highly efficient parallel supercomputer | Sameh W. Asaad, Ralph E. Bellofatto, Michael A. Blocksome, Matthias A. Blumrich, Peter Boyle +54 more | 2018-05-15 |
| 9760487 | Store operations to maintain cache coherence | Constantinos Evangelinos, Ravi Nair | 2017-09-12 |
| 9733831 | Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses | — | 2017-08-15 |
| 9720832 | Store operations to maintain cache coherence | Constantinos Evangelinos, Ravi Nair | 2017-08-01 |
| 9529838 | Transactional lock elision with delayed lock checking | Maged M. Michael, Marcel Mitran, Kai-Ting Amy Wang | 2016-12-27 |
| 9507647 | Cache as point of coherence in multiprocessor system | Matthias A. Blumrich, Luis Ceze, Dong Chen, Alan Gara, Phlip Heidelberger +2 more | 2016-11-29 |
| 9501333 | Multiprocessor system with multiple concurrent modes of execution | Daniel Ahn, Luis Ceze, Dong Chen, Alan Gara, Philip Heidelberger | 2016-11-22 |
| 9460145 | Transactional lock elision with delayed lock checking | Maged M. Michael, Marcel Mitran, Kai-Ting Amy Wang | 2016-10-04 |
| 9405596 | Code versioning for enabling transactional memory promotion | Hans Boettiger, Yaoqing Gao, Kai-Ting Amy Wang | 2016-08-02 |
| 9390038 | Local bypass for in memory computing | Bruce M. Fleischer, Thomas W. Fox, Hans M. Jacobson, Ravi Nair, Krishnan Sugavanam | 2016-07-12 |
| 9298654 | Local bypass in memory computing | Bruce M. Fleischer, Thomas W. Fox, Hans M. Jacobson, Ravi Nair, Krishnan Sugavanam | 2016-03-29 |
| 9268574 | Efficient rollback and retry of conflicted speculative threads with hardware support | Khaled A. Mohammed, Raul E. Silvera, Kai-Ting Amy Wang | 2016-02-23 |
| 9262172 | Efficient rollback and retry of conflicted speculative threads using distributed tokens | Raul E. Silvera, Mark Graham Stoodley, Kai-Ting Amy Wang | 2016-02-16 |
| 9252814 | Combined group ECC protection and subgroup parity protection | Alan Gara, Dong Chen, Philip Heidelberger | 2016-02-02 |
| 9189243 | Efficient rollback and retry of conflicted speculative threads with hardware support | Khaled A. Mohammed, Raul E. Silvera, Kai-Ting Amy Wang | 2015-11-17 |
| 9081501 | Multi-petascale highly efficient parallel supercomputer | Sameh W. Asaad, Ralph E. Bellofatto, Michael A. Blocksome, Matthias A. Blumrich, Peter Boyle +55 more | 2015-07-14 |
| 8990819 | Efficient rollback and retry of conflicted speculative threads using distributed tokens | Raul E. Silvera, Mark Graham Stoodley, Kai-Ting Amy Wang | 2015-03-24 |
| 8949539 | Conditional load and store in a shared memory | Matthias A. Blumrich | 2015-02-03 |
| 8892824 | Store-operate-coherence-on-value | Dong Chen, Philip Heidelberger, Sameer Kumar, Burkhard Steinmacher-Burow | 2014-11-18 |
| 8868837 | Cache directory lookup reader set encoding for partial cache line speculation support | Alan Gara | 2014-10-21 |