| 10707755 |
Integrated circuits with programmable gate timing signal generation for power converters and apparatus comprising the same |
Xin Zhang, Todd E. Takken, Chung-shiang Wu, Robert M. Senger, Martin Ohmacht |
2020-07-07 |
$3,757,000 |
| 9971713 |
Multi-petascale highly efficient parallel supercomputer |
Sameh W. Asaad, Ralph E. Bellofatto, Michael A. Blocksome, Matthias A. Blumrich, Peter Boyle +54 more |
2018-05-15 |
$9,390,000 |
| 9081501 |
Multi-petascale highly efficient parallel supercomputer |
Sameh W. Asaad, Ralph E. Bellofatto, Michael A. Blocksome, Matthias A. Blumrich, Peter Boyle +55 more |
2015-07-14 |
$7,900,000 |
| 9037892 |
System-wide power management control via clock distribution network |
Paul W. Coteus, Alan Gara, Thomas M. Gooding, Gerard V. Kopcsay, Thomas A. Liebsch +1 more |
2015-05-19 |
$4,677,000 |
| 8868975 |
Testing and operating a multiprocessor chip with processor redundancy |
Ralph E. Bellofatto, Steven M. Douskey, Moyra K. McManus, Martin Ohmacht, Dietmar Schmunkamp +2 more |
2014-10-21 |
$3,429,000 |
| 8595554 |
Reproducibility in a multiprocessor system |
Ralph A. Bellofatto, Dong Chen, Paul W. Coteus, Noel A. Eisley, Alan Gara +9 more |
2013-11-26 |
$4,812,000 |
| 8412974 |
Global synchronization of parallel processors using clock pulse width modulation |
Dong Chen, Matthew R. Ellavsky, Ross L. Franke, Alan Gara, Thomas M. Gooding +8 more |
2013-04-02 |
$8,535,000 |
| 8140925 |
Method and apparatus to debug an integrated circuit chip via synchronous clock stop and scan |
Ralph E. Bellofatto, Matthew R. Ellavsky, Alan Gara, Mark E. Giampapa, Thomas M. Gooding +2 more |
2012-03-20 |
$2,170,000 |
| 8001401 |
Power throttling of collections of computing elements |
Ralph E. Bellofatto, Paul W. Coteus, Paul G. Crumley, Alan Gara, Mark E. Giampapa +6 more |
2011-08-16 |
$4,692,000 |
| 7761687 |
Ultrascalable petaflop parallel supercomputer |
Matthias A. Blumrich, Dong Chen, George Liang-Tai Chiu, Thomas M. Cipolla, Paul W. Coteus +9 more |
2010-07-20 |
$3,139,000 |
| 7457187 |
Design structure for in-system redundant array repair in integrated circuits |
Arthur A. Bright, Paul G. Crumley, Marc Dombrowa, Steven M. Douskey, Steven F. Oakland +2 more |
2008-11-25 |
$6,627,000 |
| 7405990 |
Method and apparatus for in-system redundant array repair on integrated circuits |
Arthur A. Bright, Paul G. Crumley, Marc Dombrowa, Steven M. Douskey, Steven F. Oakland +2 more |
2008-07-29 |
$9,815,000 |
| 7397709 |
Method and apparatus for in-system redundant array repair on integrated circuits |
Arthur A. Bright, Paul G. Crumley, Marc Dombrowa, Steven M. Douskey, Steven F. Oakland +2 more |
2008-07-08 |
$9,414,000 |
| 7310278 |
Method and apparatus for in-system redundant array repair on integrated circuits |
Arthur A. Bright, Paul G. Crumley, Marc Dombrowa, Steven M. Douskey, Steven F. Oakland +2 more |
2007-12-18 |
$15,156,000 |
| 5999714 |
Method for incorporating noise considerations in automatic circuit optimization |
Andrew R. Conn, Chandramouli Visweswariah |
1999-12-07 |
$33,125,000 |
| 5926487 |
High performance registers for pulsed logic |
Terry I. Chappell, Michael Kevin Ciraula, Max Eduardo De Ycaza, Sang Hoo Dhong, Talal K. Jaber +3 more |
1999-07-20 |
$27,822,000 |
| 5886908 |
Method of efficient gradient computation |
Andrew R. Conn, Chandramouli Visweswariah |
1999-03-23 |
$36,980,000 |
| 5748012 |
Methodology to test pulsed logic circuits in pseudo-static mode |
Michael P. Beakes, Barbara A. Chappell, Terry I. Chappell, Bruce M. Fleischer, Talal K. Jaber +1 more |
1998-05-05 |
$15,329,000 |
| 5441690 |
Process of making pinless connector |
Juan Ayala-Esquilin, Brian S. Beaman, James L. Hedrick, Da-Yuan Shih, George F. Walker |
1995-08-15 |
$7,944,000 |
