Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8683393 | Integrated design environment for nanophotonics | Emrah Acar, William M. Green, Jonathan E. Proesel, Alexander V. Rylyakov, Yurii A. Vlasov | 2014-03-25 |
| 8627240 | Integrated design environment for nanophotonics | Emrah Acar, William M. Green, Jonathan E. Proesel, Alexander V. Rylyakov, Yurii A. Vlasov | 2014-01-07 |
| 8381156 | 3D inter-stratum connectivity robustness | Shih-Hsien Lo, Michael R. Scheuermann, Matthew R. Wordeman | 2013-02-19 |
| 6131182 | Method and apparatus for synthesizing and optimizing control logic based on SRCMOS logic array macros | Barbara Alana Chappell, Terry I. Chappell, Gary S. Ditlow, Barry Lee Dorfman, Bruce M. Fleischer +5 more | 2000-10-10 |
| 6005416 | Compiled self-resetting CMOS logic array macros | Barbara Alana Chappell, Terry I. Chappell, Gary S. Ditlow, Barry Lee Dorfman, Bruce M. Fleischer +2 more | 1999-12-21 |
| 5748012 | Methodology to test pulsed logic circuits in pseudo-static mode | Barbara A. Chappell, Terry I. Chappell, Bruce M. Fleischer, Rudolf A. Haring, Talal K. Jaber +1 more | 1998-05-05 |
| 5633820 | Self-resetting CMOS parallel adder with a bubble pipelined architecture, tri-rail merging logic, and enhanced testability | Barbara Alana Chappell, Terry I. Chappell, Bruce M. Fleischer, Thao N. Nguyen | 1997-05-27 |