Issued Patents All Time
Showing 25 most recent of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12135929 | DVD simulation using microcircuits | Altan Odabasi, Scott Johnson, Joao Geada | 2024-11-05 |
| 11663388 | DVD simulation using microcircuits | Altan Odabasi, Scott Johnson, Joao Geada | 2023-05-30 |
| 11531794 | Voltage drop analysis using local circuit representation | Altan Odabasi, Sudarsana Reddy Mallu, Tinu Thomas, Mirza Milan, Scott Johnson +2 more | 2022-12-20 |
| 11340977 | Predictive analytics for failure detection | Gradus Janssen, Rajiv V. Joshi, Tong Li | 2022-05-24 |
| 11327825 | Predictive analytics for failure detection | Gradus Janssen, Rajiv V. Joshi, Tong Li | 2022-05-10 |
| 11321513 | DVD analysis that accounts for delays | Joao Geada, Altan Odabasi, Scott Johnson | 2022-05-03 |
| 10990731 | Dynamic voltage drop analysis with improved coverage | Altan Odabasi, Sudarsana Reddy Mallu, Tinu Thomas, Mirza Milan, Scott Johnson +1 more | 2021-04-27 |
| 10963794 | Concept analysis operations utilizing accelerators | Rajesh Bordawekar, Michele M. Franceschini, Luis A. Lastras-Montano, Ruchir Puri, Haifeng Qian +1 more | 2021-03-30 |
| 10474774 | Power and performance sorting of microprocessors from first interconnect layer to wafer final test | Moyra K. McManus, Sani R. Nassif, Matthew J. Sullivan | 2019-11-12 |
| 10387596 | Multi-dimension variable predictive modeling for yield analysis acceleration | Rajiv V. Joshi, Colin J. Parris | 2019-08-20 |
| 10373057 | Concept analysis operations utilizing accelerators | Rajesh Bordawekar, Michele M. Franceschini, Luis A. Lastras-Montano, Ruchir Puri, Haifeng Qian +1 more | 2019-08-06 |
| 10310812 | Matrix ordering for cache efficiency in performing large sparse matrix operations | Rajesh Bordawekar, Michele M. Franceschini, Luis A. Lastras-Montano, Ruchir Puri, Haifeng Qian +1 more | 2019-06-04 |
| 10169509 | Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture | Rajiv V. Joshi, Tong Li | 2019-01-01 |
| 10169508 | Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture | Rajiv V. Joshi, Tong Li | 2019-01-01 |
| 10139446 | Massive multi-dimensionality failure analytics with smart converged bounds | Rajiv V. Joshi | 2018-11-27 |
| 9928327 | Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture | Rajiv V. Joshi, Tong Li | 2018-03-27 |
| 9928326 | Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture | Rajiv V. Joshi, Tong Li | 2018-03-27 |
| 9613172 | Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture | Rajiv V. Joshi, Tong Li | 2017-04-04 |
| 9606934 | Matrix ordering for cache efficiency in performing large sparse matrix operations | Rajesh Bordawekar, Michele M. Franceschini, Luis A. Lastras-Montano, Ruchir Puri, Haifeng Qian +1 more | 2017-03-28 |
| 9600615 | Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture | Rajiv V. Joshi, Tong Li | 2017-03-21 |
| 9256704 | Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture | Rajiv V. Joshi, Tong Li | 2016-02-09 |
| 8969104 | Circuit technique to electrically characterize block mask shifts | Aditya Bansal, Dureseti Chidambarrao, Liang Pang, Amith Singhee | 2015-03-03 |
| 8683393 | Integrated design environment for nanophotonics | Michael P. Beakes, William M. Green, Jonathan E. Proesel, Alexander V. Rylyakov, Yurii A. Vlasov | 2014-03-25 |
| 8635483 | Dynamically tune power proxy architectures | Pradip Bose, Bishop Brock, Alper Buyuktosunoglu, Michael Stephen Floyd, Maria Lorena Pesantez +1 more | 2014-01-21 |
| 8627240 | Integrated design environment for nanophotonics | Michael P. Beakes, William M. Green, Jonathan E. Proesel, Alexander V. Rylyakov, Yurii A. Vlasov | 2014-01-07 |