Issued Patents All Time
Showing 26–38 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8594989 | Compensating for variations in device characteristics in integrated circuit simulation | Kanak B. Agarwal, Damir A. Jamsek, Sani R. Nassif | 2013-11-26 |
| 8510699 | Performance driven layout optimization using morphing of a basis set of representative layouts | Aditya Bansal, Rama N. Singh, Amith Singhee | 2013-08-13 |
| 8409882 | Differential FET structures for electrical monitoring of overlay | Aditya Bansal, Amith Singhee | 2013-04-02 |
| 8290760 | Charge-based circuit analysis | Bhavna Agrawal, Peter Feldmann, Ying Liu, Steven G. Walker | 2012-10-16 |
| 8151230 | Blended model interpolation | Damir A. Jamsek, Sani R. Nassif | 2012-04-03 |
| 8121822 | Integrated circuit modeling based on empirical test data | Kanak B. Agarwal, Damir A. Jamsek, Sani R. Nassif | 2012-02-21 |
| 7689942 | Simultaneous power and timing optimization in integrated circuits by performing discrete actions on circuit components | Qian Haifeng | 2010-03-30 |
| 7519526 | Charge-based circuit analysis | Bhavna Agrawal, Peter Feldmann, Ying Liu, Steven G. Walker | 2009-04-14 |
| 7441213 | Method for testing the validity of initial-condition statements in circuit simulation, and correcting inconsistencies thereof | Timothy Lehner, Richard Daniel Kimmel, Ali Sadigh, Ying Liu, Ivan L. Wemple | 2008-10-21 |
| 7191113 | Method and system for short-circuit current modeling in CMOS integrated circuits | Ravishankar Arunachalam, Sani R. Nassif | 2007-03-13 |
| 7137080 | Method for determining and using leakage current sensitivities to optimize the design of an integrated circuit | Anirudh Devgan, Sani R. Nassif | 2006-11-14 |
| 6842714 | Method for determining the leakage power for an integrated circuit | Anirudh Devgan, Ying Liu, Sani R. Nassif, Haihua Su | 2005-01-11 |
| 6769100 | Method and system for power node current waveform modeling | Sani R. Nassif | 2004-07-27 |