Issued Patents All Time
Showing 426–450 of 836 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9772874 | Prioritization of transactions based on execution by transactional core with super core indicator | Fadi Y. Busaba, Harold W. Cain, III, Valentina Salapura, Eric M. Schwarz, Timothy J. Slegel | 2017-09-26 |
| 9772843 | Vector find element equal instruction | Jonathan D. Bradbury, Eric M. Schwarz, Timothy J. Slegel | 2017-09-26 |
| 9772786 | Address probing for transaction | Fadi Y. Busaba, Harold W. Cain, III, Dan F. Greiner, Maged M. Michael, Eric M. Schwarz +2 more | 2017-09-26 |
| 9766829 | Address probing for transaction | Fadi Y. Busaba, Harold W. Cain, III, Dan F. Greiner, Maged M. Michael, Eric M. Schwarz +2 more | 2017-09-19 |
| 9760494 | Hybrid tracking of transaction read and write sets | Valentina Salapura, Chung-Lung K. Shum | 2017-09-12 |
| 9760282 | Assigning home memory addresses to function call parameters | Ulrich Weigand | 2017-09-12 |
| 9760495 | Hybrid tracking of transaction read and write sets | Valentina Salapura, Chung-Lung K. Shum | 2017-09-12 |
| 9753860 | Page table entry consolidation | Anthony J. Bybell | 2017-09-05 |
| 9753851 | Multi-section garbage collection system including real-time garbage collection scheduling | Giles R. Frazier | 2017-09-05 |
| 9753764 | Alerting hardware transactions that are about to run out of space | Fadi Y. Busaba, Harold W. Cain, III, Maged M. Michael, Valentina Salapura | 2017-09-05 |
| 9747203 | Multi-section garbage collection system including multi-use source register | Giles R. Frazier | 2017-08-29 |
| 9747204 | Multi-section garbage collection system including shared performance monitor register | Giles R. Frazier, Maria Lorena Pesantez, David Henry Wilde | 2017-08-29 |
| 9740615 | Processor directly storing address range of co-processor memory accesses in a transactional memory where co-processor supplements functions of the processor | Jonathan D. Bradbury, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel | 2017-08-22 |
| 9740616 | Multi-granular cache management in multi-processor computing environments | Fadi Y. Busaba, Harold W. Cain, III, Maged M. Michael, Valentina Salapura, Eric M. Schwarz +1 more | 2017-08-22 |
| 9740624 | Selectable address translation mechanisms within a partition | — | 2017-08-22 |
| 9740625 | Selectable address translation mechanisms within a partition | — | 2017-08-22 |
| 9740628 | Page table entry consolidation | Anthony J. Bybell | 2017-08-22 |
| 9740491 | Instruction group formation techniques for decode-time instruction optimization based on feedback | Valentina Salapura | 2017-08-22 |
| 9740614 | Processor directly storing address range of co-processor memory accesses in a transactional memory where co-processor supplements functions of the processor | Jonathan D. Bradbury, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel | 2017-08-22 |
| 9734083 | Separate memory address translations for instruction fetches and data accesses | Anthony J. Bybell | 2017-08-15 |
| 9734084 | Separate memory address translations for instruction fetches and data accesses | Anthony J. Bybell | 2017-08-15 |
| 9733940 | Techniques for instruction group formation for decode-time instruction optimization based on feedback | Valentina Salapura | 2017-08-15 |
| 9734052 | Multi-section garbage collection | Giles R. Frazier, Younes Manton, Karl M. Taylor, Brian W. Thompto | 2017-08-15 |
| 9734053 | Garbage collection handler to update object pointers | Giles R. Frazier | 2017-08-15 |
| 9727484 | Dynamic cache memory management with translation lookaside buffer protection | Jonathan D. Bradbury, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel | 2017-08-08 |