Issued Patents All Time
Showing 401–425 of 836 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9858074 | Non-default instruction handling within transaction | Jonathan D. Bradbury, Maged M. Michael, Eric M. Schwarz, Valentina Salapura, Chung-Lung K. Shum | 2018-01-02 |
| 9858189 | Hybrid tracking of transaction read and write sets | Valentina Salapura, Chung-Lung K. Shum | 2018-01-02 |
| 9851974 | Selective suppression of instruction cache-related directory access | Valentina Salapura | 2017-12-26 |
| 9851971 | Latent modification instruction for transactional execution | Valentina Salapura, Chung-Lung K. Shum, Timothy J. Slegel | 2017-12-26 |
| 9846593 | Predicting the length of a transaction | Jonathan D. Bradbury, Harold W. Cain, III, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum +1 more | 2017-12-19 |
| 9836405 | Dynamic management of virtual memory blocks exempted from cache memory access | Jonathan D. Bradbury, Dan F. Greiner, Christian Jacobi, Younes Manton, Anthony Saporito +1 more | 2017-12-05 |
| 9836411 | Synchronizing updates of page table status indicators and performing bulk operations | — | 2017-12-05 |
| 9836291 | Reconfiguration of address space based on loading short pointer mode application | — | 2017-12-05 |
| 9830185 | Indicating nearing the completion of a transaction | Jonathan D. Bradbury, Dan F. Greiner, Maged M. Michael, Chung-Lung K. Shum | 2017-11-28 |
| 9830159 | Suspending branch prediction upon entering transactional execution mode | Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum | 2017-11-28 |
| 9824022 | Address translation structures to provide separate translations for instruction fetches and data accesses | — | 2017-11-21 |
| 9824021 | Address translation structures to provide separate translations for instruction fetches and data accesses | — | 2017-11-21 |
| 9817693 | Coherence protocol augmentation to indicate transaction status | Fadi Y. Busaba, Harold W. Cain, III, Christian Jacobi, Valentina Salapura, Eric M. Schwarz +1 more | 2017-11-14 |
| 9815197 | Device, system and method for tracking and replacing lights with automated vehicles | Clifford A. Pickover, Maja Vukovic, Valentina Salapura | 2017-11-14 |
| 9811472 | Radix table translation of memory | Anthony J. Bybell | 2017-11-07 |
| 9811397 | Direct application-level control of multiple asynchronous events | Giles R. Frazier | 2017-11-07 |
| 9811396 | Direct application-level control of multiple asynchronous events | Giles R. Frazier | 2017-11-07 |
| 9792148 | Prioritization of transactions based on execution progress | Valentina Salapura | 2017-10-17 |
| 9792149 | Prioritization of transactions based on execution progress | Valentina Salapura | 2017-10-17 |
| 9785569 | Radix table translation of memory | Anthony J. Bybell | 2017-10-10 |
| 9785555 | Synchronizing updates of page table status indicators in a multiprocessing environment | — | 2017-10-10 |
| 9785554 | Synchronizing updates of page table status indicators in a multiprocessing environment | — | 2017-10-10 |
| 9785435 | Floating point instruction with selectable comparison attributes | Jonathan D. Bradbury, Silvia M. Mueller, Brett Olsson, Eric M. Schwarz | 2017-10-10 |
| 9785352 | Transparent code patching | — | 2017-10-10 |
| 9772944 | Transactional execution in a multi-processor environment that monitors memory conflicts in a shared cache | Fadi Y. Busaba, Eric M. Schwarz, Chung-Lung K. Shum | 2017-09-26 |