Issued Patents All Time
Showing 26–50 of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6990025 | Multi-port memory architecture | Toshiaki Kirihata, Hoki Kim | 2006-01-24 |
| 6845059 | High performance gain cell architecture | John E. Barth, Jr., Toshiaki Kirihata | 2005-01-18 |
| 6829682 | Destructive read architecture for dynamic random access memories | Toshiaki Kirihata, Sang Hoo Dhong, Hwa-Joon Oh | 2004-12-07 |
| 6774463 | Superconductor gate semiconductor channel field effect transistor | Praveen Chaudhari, Richard J. Gambino, Eti Ganin, Roger Koch, Lia Krusin-Elbaum +3 more | 2004-08-10 |
| 6396324 | Clock system for an embedded semiconductor memory unit | Louis L. Hsu, Rajiv V. Joshi, Richard Michael Parent | 2002-05-28 |
| 6351019 | Planarized and fill biased integrated circuit chip | John K. DeBrosse | 2002-02-26 |
| 6349067 | System and method for preventing noise cross contamination between embedded DRAM and system chip | Louis L. Hsu, Richard Michael Parent, Li-Kong Wang | 2002-02-19 |
| 6344381 | Method for forming pillar CMOS | John A. Bracchitta, Jack A. Mandelman, Stephen A. Parke | 2002-02-05 |
| 6343044 | Super low-power generator system for embedded applications | Louis L. Hsu, Richard Michael Parent | 2002-01-29 |
| 6341097 | Selective address space refresh mode | Louis L. Hsu, Richard Michael Parent | 2002-01-22 |
| 6337497 | Common source transistor capacitor stack | Hussein I. Hanafi, Arvind Kumar | 2002-01-08 |
| 6278317 | Charge pump system having multiple charging rates and corresponding method | Louis L. Hsu, Oliver Weinfurtner | 2001-08-21 |
| 6275096 | Charge pump system having multiple independently activated charge pumps and corresponding method | Louis L. Hsu, Oliver Weinfurtner | 2001-08-14 |
| 6255699 | Pillar CMOS structure | John A. Bracchitta, Jack A. Mandelman, Stephen A. Parke | 2001-07-03 |
| 6236617 | High performance CMOS word-line driver | Louis L. Hsu, Hans-Oliver Joachim, Hing Wong | 2001-05-22 |
| 6204532 | Pillar transistor incorporating a body contact | Jeffrey P. Gambino, Jack A. Mandelman, Stephen A. Parke | 2001-03-20 |
| 6121078 | Integrated circuit planarization and fill biasing design method | John K. DeBrosse | 2000-09-19 |
| 6107125 | SOI/bulk hybrid substrate and method of forming the same | Mark A. Jaso, Jack A. Mandelman, William R. Tonti | 2000-08-22 |
| 6100123 | Pillar CMOS structure | John A. Bracchitta, Jack A. Mandelman, Stephen A. Parke | 2000-08-08 |
| 6020239 | Pillar transistor incorporating a body contact | Jeffrey P. Gambino, Jack A. Mandelman, Stephen A. Parke | 2000-02-01 |
| 5930178 | Bitline voltage stabilization device and method | Louis L. Hsu, Jack A. Mandelman | 1999-07-27 |
| 5894152 | SOI/bulk hybrid substrate and method of forming the same | Mark A. Jaso, Jack A. Mandelman, William R. Tonti | 1999-04-13 |
| 5862058 | Optical proximity correction method and system | Donald J. Samuels | 1999-01-19 |
| 5483179 | Data output drivers with pull-up devices | Sang Hoo Dhong, Toshiaki Kirihata | 1996-01-09 |
| 5389567 | Method of forming a non-volatile DRAM cell | Alexandre Acovic, Ching-Hsiang Hsu, Being S. Wu | 1995-02-14 |