| 5960265 |
Method of making EEPROM having coplanar on-insulator FET and control gate |
Tak H. Ning, Paul M. Solomon |
1999-09-28 |
| 5886376 |
EEPROM having coplanar on-insulator FET and control gate |
Tak H. Ning, Paul M. Solomon |
1999-03-23 |
| 5567635 |
Method of making a three dimensional trench EEPROM cell structure |
Ching-Hsiang Hsu, Being S. Wu |
1996-10-22 |
| 5446299 |
Semiconductor random access memory cell on silicon-on-insulator with dual control gates |
Ben Wu |
1995-08-29 |
| 5411905 |
Method of making trench EEPROM structure on SOI with dual channels |
Ben Wu |
1995-05-02 |
| 5389567 |
Method of forming a non-volatile DRAM cell |
Ching-Hsiang Hsu, Matthew R. Wordeman, Being S. Wu |
1995-02-14 |
| 5331188 |
Non-volatile DRAM cell |
Ching-Hsiang Hsu, Matthew R. Wordeman, Being S. Wu |
1994-07-19 |
| 5315142 |
High performance trench EEPROM cell |
Ching-Hsiang Hsu, Being S. Wu |
1994-05-24 |
