Issued Patents All Time
Showing 51–75 of 124 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9632820 | Prefetching of discontiguous storage locations in anticipation of transactional execution | Fadi Y. Busaba, Dan F. Greiner, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz +1 more | 2017-04-25 |
| 9626187 | Transactional memory system supporting unbroken suspended execution | Harold W. Cain, III, Bradly G. Frey, Benjamin Herrenschmidt, Hung Q. Le, Cathy May +4 more | 2017-04-18 |
| 9619383 | Dynamic predictor for coalescing memory transactions | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Eric M. Schwarz | 2017-04-11 |
| 9563467 | Interprocessor memory status communication | Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel | 2017-02-07 |
| 9563468 | Interprocessor memory status communication | Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel | 2017-02-07 |
| 9547595 | Salvaging lock elision transactions | Harold W. Cain, III, Michael K. Gschwind, Chung-Lung K. Shum | 2017-01-17 |
| 9535696 | Instruction to cancel outstanding cache prefetches | Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum | 2017-01-03 |
| 9529839 | Applying limited-size hardware transactional memory to arbitrarily large data structure | Paul E. McKenney | 2016-12-27 |
| 9529838 | Transactional lock elision with delayed lock checking | Marcel Mitran, Martin Ohmacht, Kai-Ting Amy Wang | 2016-12-27 |
| 9524187 | Executing instruction with threshold indicating nearing of completion of transaction | Jonathan D. Bradbury, Dan F. Greiner, Michael K. Gschwind, Chung-Lung K. Shum | 2016-12-20 |
| 9524195 | Adaptive process for data sharing with selection of lock elision and locking | Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2016-12-20 |
| 9524196 | Adaptive process for data sharing with selection of lock elision and locking | Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2016-12-20 |
| 9471371 | Dynamic prediction of concurrent hardware transactions resource requirements and allocation | Fadi Y. Busaba, Dan F. Greiner, Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2016-10-18 |
| 9460145 | Transactional lock elision with delayed lock checking | Marcel Mitran, Martin Ohmacht, Kai-Ting Amy Wang | 2016-10-04 |
| 9454483 | Salvaging lock elision transactions with instructions to change execution type | Harold W. Cain, III, Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2016-09-27 |
| 9448836 | Alerting hardware transactions that are about to run out of space | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Valentina Salapura | 2016-09-20 |
| 9442776 | Salvaging hardware transactions with instructions to transfer transaction execution control | Harold W. Cain, III, Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2016-09-13 |
| 9442853 | Salvaging lock elision transactions with instructions to change execution type | Harold W. Cain, III, Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2016-09-13 |
| 9442775 | Salvaging hardware transactions with instructions to transfer transaction execution control | Harold W. Cain, III, Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2016-09-13 |
| 9430276 | Coalescing memory transactions | Fadi Y. Busaba, Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2016-08-30 |
| 9430273 | Suppressing aborting a transaction beyond a threshold execution duration based on the predicted duration | Jonathan D. Bradbury, Harold W. Cain, III, Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum +1 more | 2016-08-30 |
| 9424072 | Alerting hardware transactions that are about to run out of space | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Valentina Salapura | 2016-08-23 |
| 9411729 | Salvaging lock elision transactions | Harold W. Cain, III, Michael K. Gschwind, Chung-Lung K. Shum | 2016-08-09 |
| 9389802 | Hint instruction for managing transactional aborts in transactional memory computing environments | Fadi Y. Busaba, Harold W. Cain, III, Dan F. Greiner, Michael K. Gschwind, Valentina Salapura +2 more | 2016-07-12 |
| 9383930 | Code optimization to enable and disable coalescing of memory transactions | Fadi Y. Busaba, Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2016-07-05 |