JP

Jochen Preiss

IBM: 19 patents #5,782 of 70,183Top 9%
Overall (All Time): #240,069 of 4,157,543Top 6%
19
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8756263 Binary logic unit and method to operate a binary logic unit Tobias Gemmeke 2014-06-17
8626807 Reuse of rounder for fixed conversion of log instructions Maarten J. Boersma, Markus Kaltenbach, Michael Klein, Silvia M. Mueller 2014-01-07
8578196 Zero indication forwarding for floating point unit power reduction Harry Barowski, Maarten J. Boersma, Silvia M. Mueller, Tim Niggemeier 2013-11-05
8566383 Distributed residue-checking of a floating point unit Son T. Dao, Juergen Haess, Michael K. Kroener, Silvia M. Mueller 2013-10-22
8452824 Binary logic unit and method to operate a binary logic unit Tobias Gemmeke 2013-05-28
8407275 Fast floating point compare with slower backup for corner cases Maarten J. Boersma, Michael K. Kroener, Silvia M. Mueller 2013-03-26
8370409 Electronic computing circuit for operand width reduction for a modulo adder followed by saturation concurrent message processing Tobias Gemmeke, Nicolas Maeding 2013-02-05
8352531 Efficient forcing of corner cases in a floating point rounder Maarten J. Boersma, J. Adam Butts, Silvia M. Mueller 2013-01-08
8346828 System and method for storing numbers in first and second formats in a register file Maarten J. Boersma, Michael K. Kroener, Petra Leber, Silvia M. Mueller, Kerstin Claudia Schelm 2013-01-01
8332453 Shifter with all-one and all-zero detection using a portion of partially shifted vector and shift amount in parallel to generated shifted result Maarten J. Boersma, Silvia M. Mueller, Holger Wetter 2012-12-11
8291003 Supporting multiple formats in a floating point processor Maarten J. Boersma, K. Michael Kroener, Petra Leber, Silvia M. Mueller, Kerstin Claudia Schelm 2012-10-16
8255726 Zero indication forwarding for floating point unit power reduction Harry Barowski, Maarten J. Boersma, Silvia M. Mueller, Tim Niggemeier 2012-08-28
8244783 Normalizer shift prediction for log estimate instructions Maarten J. Boersma, Michael Klein, Son Dao Trong 2012-08-14
8032854 3-stack floorplan for floating point unit Maarten J. Boersma, Michael K. Kroener, Petra Leber, Silvia M. Mueller, Kerstin Claudia Schelm 2011-10-04
7996738 Semiconductor chip with a plurality of scannable storage elements and a method for scanning storage elements on a semiconductor chip Tobias Gemmeke, Christoph Jaeschke, Jens Kuenzer, Cedric Lichtenau, Thomas Pflueger 2011-08-09
7735038 Design structure to reduce power consumption within a clock gated synchronous circuit and clock gated synchronous circuit Tobias Gemmeke, Jens Leenstra 2010-06-08
7694112 Multiplexing output from second execution unit add/saturation processing portion of wider width intermediate result of first primitive execution unit for compound computation Harry Barowski, J. Adam Butts, Stephen V. Kosonocky, Silvia M. Mueller 2010-04-06
7639046 Method to reduce power consumption within a clock gated synchronous circuit and clock gated synchronous circuit Tobias Gemmeke, Jens Leenstra 2009-12-29
7461117 Floating point unit with fused multiply add and method for calculating a result with a floating point unit Son Dao Trong, Juergen Haess, Christian Jacobi, Klaus M. Kroener, Silvia M. Mueller 2008-12-02