Issued Patents All Time
Showing 76–100 of 186 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11165017 | Replacement bottom electrode structure process to form misalignment tolerate MRAM with high yield | Pouya Hashemi, Takashi Ando, Dimitri Houssameddine, Alexander Reznicek, Choonghyun Lee | 2021-11-02 |
| 11164960 | Transistor having in-situ doped nanosheets with gradient doped channel regions | Ruilong Xie, Alexander Reznicek | 2021-11-02 |
| 11164792 | Complementary field-effect transistors | Ruilong Xie, Alexander Reznicek, Junli Wang | 2021-11-02 |
| 11158715 | Vertical FET with asymmetric threshold voltage and channel thicknesses | Choonghyun Lee, Takashi Ando, Pouya Hashemi, Alexander Reznicek | 2021-10-26 |
| 11152510 | Long channel optimization for gate-all-around transistors | Takashi Ando, Choonghyun Lee, Pouya Hashemi, Alexander Reznicek | 2021-10-19 |
| 11152264 | Multi-Vt scheme with same dipole thickness for gate-all-around transistors | Takashi Ando, Alexander Reznicek | 2021-10-19 |
| 11133309 | Multi-threshold voltage gate-all-around transistors | Takashi Ando, Choonghyun Lee | 2021-09-28 |
| 11133305 | Nanosheet P-type transistor with oxygen reservoir | Takashi Ando, Choonghyun Lee | 2021-09-28 |
| 11121218 | Gate-all-around transistor structure | Takashi Ando, Choonghyun Lee | 2021-09-14 |
| 11107752 | Half buried nFET/pFET epitaxy source/drain strap | Ruilong Xie, Alexander Reznicek, Bruce B. Doris | 2021-08-31 |
| 11088288 | Stacked-nanosheet semiconductor structures with support structures | Ruilong Xie, Xin Miao, Alexander Reznicek | 2021-08-10 |
| 11088139 | Asymmetric threshold voltage VTFET with intrinsic dual channel epitaxy | Choonghyun Lee, Takashi Ando, Alexander Reznicek, Pouya Hashemi | 2021-08-10 |
| 11081567 | Replacement-channel fabrication of III-V nanosheet devices | Choonghyun Lee, Chun Wing Yeung, Robin Hsin Kuo Chao, Heng Wu | 2021-08-03 |
| 11081547 | Method for making superimposed transistors | Shay Reboh, Remi Coquand, Nicolas Loubet, Tenko Yamashita | 2021-08-03 |
| 11081404 | Source/drain for gate-all-around devices | Alexander Reznicek, Takashi Ando, Choonghyun Lee | 2021-08-03 |
| 11075301 | Nanosheet with buried gate contact | Choonghyun Lee, Takashi Ando, Alexander Reznicek, Pouya Hashemi | 2021-07-27 |
| 11075273 | Nanosheet electrostatic discharge structure | Alexander Reznicek, Xin Miao, Choonghyun Lee | 2021-07-27 |
| 11062955 | Vertical transistors having uniform channel length | Choonghyun Lee, Takashi Ando, Alexander Reznicek, Pouya Hashemi | 2021-07-13 |
| 11063134 | Vertical transistors with top spacers | Xin Miao, Choonghyun Lee, Alexander Reznicek | 2021-07-13 |
| 11049979 | Long channel nanosheet FET having tri-layer spacers | Xin Miao, Ruilong Xie, Choonghyun Lee | 2021-06-29 |
| 11037986 | Stacked resistive memory with individual switch control | Takashi Ando, Pouya Hashemi, Alexander Reznicek, Choonghyun Lee | 2021-06-15 |
| 11037832 | Threshold voltage adjustment by inner spacer material selection | Takashi Ando, Choonghyun Lee, Pouya Hashemi | 2021-06-15 |
| 11024740 | Asymmetric channel threshold voltage | Choonghyun Lee, Takashi Ando, Alexander Reznicek, Pouya Hashemi | 2021-06-01 |
| 11024724 | Vertical FET with differential top spacer | Takashi Ando, Choonghyun Lee, Pouya Hashemi | 2021-06-01 |
| 11018062 | Multivalent oxide cap for multiple work function gate stacks on high mobility channel materials | Takashi Ando, Choonghyun Lee, Pouya Hashemi | 2021-05-25 |