Issued Patents All Time
Showing 151–175 of 190 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8669615 | Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devices | Josephine B. Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2014-03-11 |
| 8669167 | Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devices | Josephine B. Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2014-03-11 |
| 8659006 | Techniques for metal gate work function engineering to enable multiple threshold voltage nanowire FET devices | Josephine B. Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2014-02-25 |
| 8658518 | Techniques for metal gate work function engineering to enable multiple threshold voltage nanowire FET devices | Josephine B. Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2014-02-25 |
| 8659084 | Techniques for gate workfunction engineering to reduce short channel effects in planar CMOS devices | Josephine B. Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2014-02-25 |
| 8618636 | Fin bipolar transistors having self-aligned collector and emitter regions | Josephine B. Chang, Gen P. Lauer, Jeffrey W. Sleight | 2013-12-31 |
| 8617957 | Fin bipolar transistors having self-aligned collector and emitter regions | Josephine B. Chang, Gen P. Lauer, Jeffrey W. Sleight | 2013-12-31 |
| 8619465 | 8-transistor SRAM cell design with inner pass-gate junction diodes | Leland Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2013-12-31 |
| 8610181 | V-groove source/drain MOSFET and process for fabricating same | Michael A. Guillorn, Gen P. Lauer, Jeffrey W. Sleight | 2013-12-17 |
| 8603868 | V-groove source/drain MOSFET and process for fabricating same | Michael A. Guillorn, Gen P. Lauer, Jeffrey W. Sleight | 2013-12-10 |
| 8597991 | Embedded silicon germanium n-type filed effect transistor for reduced floating body effect | Leland Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2013-12-03 |
| 8592295 | Gate-all around semiconductor nanowire FETs on bulk semiconductor wafers | Jeffrey W. Sleight, Josephine B. Chang, Shreesh Narasimha | 2013-11-26 |
| 8536041 | Method for fabricating transistor with high-K dielectric sidewall spacer | Leland Chang, Jeffrey W. Sleight | 2013-09-17 |
| 8530932 | Replacement spacer for tunnel FETS | Josephine B. Chang, Michael A. Guillorn, Amlan Majumdar | 2013-09-10 |
| 8531871 | 8-transistor SRAM cell design with Schottky diodes | Leland Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2013-09-10 |
| 8526228 | 8-transistor SRAM cell design with outer pass-gate diodes | Leland Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2013-09-03 |
| 8507892 | Omega shaped nanowire tunnel field effect transistors | Sarunya Bangsaruntip, Josephine B. Chang, Jeffrey W. Sleight | 2013-08-13 |
| 8502325 | Metal high-K transistor having silicon sidewalls for reduced parasitic capacitance | Leland Chang, Jeffrey W. Sleight, Renee T. Mo | 2013-08-06 |
| 8431995 | Methodology for fabricating isotropically recessed drain regions of CMOS transistors | Nicholas C. M. Fuller, Steve Koester, Ying Zhang | 2013-04-30 |
| 8367485 | Embedded silicon germanium n-type filed effect transistor for reduced floating body effect | Leland Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2013-02-05 |
| 8343815 | TFET with nanowire source | Sarunya Bangsaruntip, Amlan Majumdar, Jeffrey W. Sleight | 2013-01-01 |
| 8338239 | High performance devices and high density devices on single chip | Leland Chang, Jeffrey W. Sleight | 2012-12-25 |
| 8324030 | Nanowire tunnel field effect transistors | Sarunya Bangsaruntip, Amlan Majumdar, Jeffrey W. Sleight | 2012-12-04 |
| 8318568 | Tunnel field effect transistor | Bruce B. Doris, Kangguo Cheng, Wilfried E. Haensch, Ali Khakifirooz, Ghavam G. Shahidi | 2012-11-27 |
| 8263477 | Structure for use in fabrication of PiN heterojunction TFET | Sarunya Bangsaruntip, Steven J. Koester, Jeffrey W. Sleight | 2012-09-11 |