Issued Patents All Time
Showing 76–99 of 99 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6820142 | Token based DMA | Ravi Nair, John-David Wellman | 2004-11-16 |
| 6793123 | Packaging for multi-processor shared-memory system | Eric A. Johnson, Randall J. Stutzman, Jamil A. Wakil | 2004-09-21 |
| 6785841 | Processor with redundant logic | Chekib Akrout, James Allan Kahle | 2004-08-31 |
| 6779049 | Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism | Erik R. Altman, Peter G. Capek, Michael K. Gschwind, James Allan Kahle, Ravi Nair +4 more | 2004-08-17 |
| 6772368 | Multiprocessor with pair-wise high reliability mode, and method therefore | Sang Hoo Dhong, Ravi Nair, Steven Douglas Posluszny | 2004-08-03 |
| 6760819 | Symmetric multiprocessor coherence mechanism | Sang Hoo Dhong, Charles Ray Johns, John Liberty, Thuong Quang Truong | 2004-07-06 |
| 6751749 | Method and apparatus for computer system reliability | Ravi Nair | 2004-06-15 |
| 6728872 | Method and apparatus for verifying that instructions are pipelined in correct architectural sequence | Brian King Flacks | 2004-04-27 |
| 6717882 | Cell circuit for multiport memory using 3-way multiplexer | Sang Hoo Dhong, Shoji Onishi, Osamu Takahashi | 2004-04-06 |
| 6708267 | System and method in a pipelined processor for generating a single cycle pipeline stall | Brian King Flacks, Osamu Takahashi | 2004-03-16 |
| 6629235 | Condition code register architecture for supporting multiple execution units | Brian Flachs, Kevin John Nowka | 2003-09-30 |
| 6600959 | Method and apparatus for implementing microprocessor control logic using dynamic programmable logic arrays | Paula Kristine Coulman, Sang Hoo Dhong, Brian Flachs, Jaehong Park, Stephen Douglas Posluszny +2 more | 2003-07-29 |
| 6598153 | Processor and method that accelerate evaluation of pairs of condition-setting and branch instructions | Brian Flachs, Kevin John Nowka | 2003-07-22 |
| 6587941 | Processor with improved history file mechanism for restoring processor state after an exception | Brian King Flacks, Osamu Takahashi | 2003-07-01 |
| 6541847 | Packaging for multi-processor shared-memory system | Eric A. Johnson, Randall J. Stutzman, Jamil A. Wakil | 2003-04-01 |
| 6507115 | Multi-chip integrated circuit module | Robert K. Montoye, Edmund J. Sprogis | 2003-01-14 |
| 6502224 | Method and apparatus for synthesizing levelized logic | Sang Hoo Dhong, Stephen Douglas Posluszny, Joel A. Silberman, Osamu Takahashi, Dieter Wendel | 2002-12-31 |
| 6430672 | Method for performing address mapping using two lookup tables | Sang Hoo Dhong, Osamu Takahashi, Jan Van Lunteren | 2002-08-06 |
| 6335650 | Method and apparatus for adjusting time delays in circuits with multiple operating supply voltages | David William Boerstler, Hung C. Ngo, Kevin John Nowka | 2002-01-01 |
| 6268660 | Silicon packaging with through wafer interconnects | Sang Hoo Dhong, Michael J. Shapiro | 2001-07-31 |
| 6212619 | System and method for high-speed register renaming by counting | Sang Hoo Dhong, Kevin John Nowka, Joel A. Silberman | 2001-04-03 |
| 6138208 | Multiple level cache memory with overlapped L1 and L2 memory access | Sang Hoo Dhong, David Meltzer, Joel A. Silberman | 2000-10-24 |
| 6038659 | Method for using read-only memory to generate controls for microprocessor | Sang Hoo Dhong, David Meltzer, Joel A. Silberman | 2000-03-14 |
| 6014763 | At-speed scan testing | Sang Hoo Dhong, Kevin John Nowka, Joel A. Silberman | 2000-01-11 |