Issued Patents All Time
Showing 26–50 of 276 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10942397 | Spatial phase modulator and method for producing spatial phase modulator | Liangjia Zong, Daping Chu | 2021-03-09 |
| 10892322 | Circuits employing a double diffusion break (DDB) and single diffusion break (SDB) in different type diffusion region(s), and related fabrication methods | Jie Deng | 2021-01-12 |
| 10854604 | Offset gate contact | ChihWei Kuo, Jun Yuan, Kern Rim | 2020-12-01 |
| 10833017 | Contact for semiconductor device | Yanxiang Liu, Youseok Suh, Jihong Choi, Junjing Bao | 2020-11-10 |
| 10825536 | Programmable circuits for performing machine learning operations on edge devices | Periannan Chidambaram | 2020-11-03 |
| 10761392 | Polarisation-independent, optical multiplexing and demultiplexing systems based on ferroelectric liquid crystal phase modulators for spatial mode division multiplexing and demultiplexing | Daping Chu | 2020-09-01 |
| 10700804 | Optical switching systems | Brian Robertson, Daping Chu, Peter John Wilkinson | 2020-06-30 |
| 10679994 | Circuits employing asymmetric diffusion breaks in different type semiconductor diffusion regions, and related fabrication methods | — | 2020-06-09 |
| 10622479 | Circuits employing a double diffusion break (DDB) and single diffusion break (SDB) in different type diffusion region(s), and related fabrication methods | — | 2020-04-14 |
| 10587936 | Optical systems | Daping Chu, Brian Robertson | 2020-03-10 |
| 10491322 | Optical switching systems | Brian Robertson, Daping Chu, Peter John Wilkinson | 2019-11-26 |
| 10483200 | Integrated circuits (ICs) employing additional output vertical interconnect access(es) (VIA(s)) coupled to a circuit output VIA to decrease circuit output resistance | Xiangdong Chen, John Jianhong Zhu | 2019-11-19 |
| 10431686 | Integrated circuit (IC) employing a channel structure layout having an active semiconductor channel structure(s) and an isolated neighboring dummy semiconductor channel structure(s) for increased uniformity | Xiangdong Chen | 2019-10-01 |
| 10340370 | Asymmetric gated fin field effect transistor (FET) (finFET) diodes | Hao Wang, Xiaonan Chen | 2019-07-02 |
| 10199462 | Semiconductor integrated circuits (ICs) employing localized low dielectric constant (low-K) material in inter-layer dielectric (ILD) material for improved speed performance | Xiangdong Chen | 2019-02-05 |
| 10175571 | Hybrid coloring methodology for multi-pattern technology | Xiangdong Chen, Hyeokjin Lim, Ohsang Kwon, Mickael Malabry, Jingwei Zhang +5 more | 2019-01-08 |
| 10141306 | Systems, methods, and apparatus for improved finFETs | Yanxiang Liu | 2018-11-27 |
| 10141305 | Semiconductor devices employing field effect transistors (FETs) with multiple channel structures without shallow trench isolation (STI) void-induced electrical shorts | Jeffrey Junhao Xu, Jun Yuan, Kern Rim, Periannan Chidambaram | 2018-11-27 |
| 10062763 | Method and apparatus for selectively forming nitride caps on metal gate | Junjing Bao, Yanxiang Liu, Jeffrey Junhao Xu | 2018-08-28 |
| 10018515 | Transistor temperature sensing | Yanxiang Liu, Kern Rim | 2018-07-10 |
| 9978738 | System, apparatus, and method for N/P tuning in a fin-FET | Yanxiang Liu | 2018-05-22 |
| 9941377 | Semiconductor devices with wider field gates for reduced gate resistance | Xiangdong Chen | 2018-04-10 |
| 9773866 | Semiconductor integrated circuits (ICs) employing localized low dielectric constant (low-K) material in inter-layer dielectric (ILD) material for improved speed performance | Xiangdong Chen | 2017-09-26 |
| 9698232 | Conductive cap for metal-gate transistor | Stanley Seungchul Song | 2017-07-04 |
| 9653466 | FinFET device and method of making the same | Yanxiang Liu | 2017-05-16 |