Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Gary Lippert — 14 Patents

IBM: 8 patents #13,181 of 70,183Top 20%
LSLsi: 5 patents #795 of 3,238Top 25%
APAvago Technologies General Ip (Singapore) Pte.: 1 patents #883 of 2,004Top 45%
Kasson, MN: #4 of 58 inventorsTop 7%
Minnesota: #5,382 of 52,454 inventorsTop 15%
Overall (All Time): #332,869 of 4,157,543Top 9%
14 Patents All Time
Gary Lippert has been granted 14 US patents while listed as an inventor at IBM. The first was granted in 2000 and the most recent in January 2016. Gary Lippert ranks #332,869 of 4,157,543 US inventors in our database (top 8.0%). Patent records list Gary Lippert in Kasson, MN, US.

Patents per Year

Patents granted per year, 2000 to 2016Bar chart with a peak of 2 patents in 2001.peak 22000: 1 patents20002001: 2 patents2002: 2 patents20022003: 1 patents2004: 1 patents20042005: 1 patents2007: 1 patents20072008: 1 patents2009: 1 patents20092012: 1 patents2014: 1 patents20142016: 1 patents2016

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9235521 Cache system for managing various cache line conditions Judy M. Gehman, Scott E. Greenfield, Jerome M. Meyer, John M. Nystuen 2016-01-12 $22,172,000
8924779 Proxy responder for handling anomalies in a hardware system George Wayne Nation, Srinivasa Rao Kothamasu 2014-12-30
8095734 Managing cache line allocations for multiple issue processors Judy M. Gehman, John M. Nystuen 2012-01-10
7496861 Method for generalizing design attributes in a design capture environment George Wayne Nation, Gary S. Delp 2009-02-24 $3,472,000
7340700 Method for abstraction of manufacturing test access and control ports to support automated RTL manufacturing test insertion flow for reusable modules Steven Emerson, Jonathan Byrn, Donald Gabrielson 2008-03-04 $8,518,000
7157948 Method and apparatus for calibrating a delay line Gary McClannahan, Daniel Paul Wetzel 2007-01-02
6871267 Method for increasing efficiency in a multi-processor system and multi-processor system with increased efficiency Donald Lee Freerksen 2005-03-22 $9,449,000
6823431 Method for increasing efficiency in a multi-processor system and multi-processor system with increased efficiency Donald Lee Freerksen 2004-11-23 $4,043,000
6557084 Apparatus and method to improve performance of reads from and writes to shared memory locations Donald Lee Freerksen, Sheldon B. Levenstein 2003-04-29 $13,645,000
6467032 Controlled reissue delay of memory requests to reduce shared memory address contention 2002-10-15 $14,907,000
6351791 Circuit arrangement and method of maintaining cache coherence utilizing snoop response collection logic that disregards extraneous retry responses Donald Lee Freerksen, Farnaz Mounes-Toussi 2002-02-26 $30,939,000
6314491 Peer-to-peer cache moves in a multiprocessor data processing system Donald Lee Freerksen, John D. Irish 2001-11-06 $29,245,000
6260117 Method for increasing efficiency in a multi-processor system and multi-processor system with increased efficiency Donald Lee Freerksen 2001-07-10 $19,901,000
6065098 Method for maintaining multi-level cache coherency in a processor with non-inclusive caches and processor implementing the same 2000-05-16 $24,852,000