Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8923087 | Method and apparatus for decreasing leakage power consumption in power gated memories | Romeshkumar Bharatkumar Mehta, Dharmesh Kishor Tirthdasani, Ravindra Bidnur | 2014-12-30 |
| 8924779 | Proxy responder for handling anomalies in a hardware system | George Wayne Nation, Gary Lippert | 2014-12-30 |
| 8904221 | Arbitration circuitry for asynchronous memory accesses | Sathappan Palaniappan, Deepak Naik | 2014-12-02 |
| 8667196 | Interconnect congestion reduction for memory-mapped peripherals | Debjit Roy Choudhury, Dharmesh Kishor Tirthdasani, Sajith Kizhakke Kalathil Achuthan Kutty, Jean-Baptiste Jacob | 2014-03-04 |
| 8583844 | System and method for optimizing slave transaction ID width based on sparse connection in multilayer multilevel interconnect system-on-chip architecture | Sakthivel Komarasamy Pullagoundapatti, Venkat Rao Vallapaneni, Claus Pribbernow, Shrinivas Sureban | 2013-11-12 |
| 8533377 | System and method for allocating transaction ID in a system with a plurality of processing modules | Venkat Rao Vallapaneni, Sakthivel Komarasamy Pullagoundapatti | 2013-09-10 |
| 8527684 | Closed loop dynamic interconnect bus allocation method and architecture for a multi layer SoC | — | 2013-09-03 |
| 8504756 | System, circuit and method for improving system-on-chip bandwidth performance for high latency peripheral read accesses | Sreenath Shambu Ramakrishna | 2013-08-06 |