Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8583844 | System and method for optimizing slave transaction ID width based on sparse connection in multilayer multilevel interconnect system-on-chip architecture | Srinivasa Rao Kothamasu, Venkat Rao Vallapaneni, Claus Pribbernow, Shrinivas Sureban | 2013-11-12 |
| 8533377 | System and method for allocating transaction ID in a system with a plurality of processing modules | Venkat Rao Vallapaneni, Srinivasa Rao Kothamasu | 2013-09-10 |
| 7984212 | System and method for utilizing first-in-first-out (FIFO) resources for handling differences in data rates between peripherals via a merge module that merges FIFO channels | Shrinivas Sureban | 2011-07-19 |