Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8947966 | Power gated memory device with power state indication | Sathappan Palaniappan, Dharmesh Kishor Tirthdasani | 2015-02-03 |
| 8923087 | Method and apparatus for decreasing leakage power consumption in power gated memories | Dharmesh Kishor Tirthdasani, Srinivasa Rao Kothamasu, Ravindra Bidnur | 2014-12-30 |
| 8707133 | Method and apparatus to reduce a quantity of error detection/correction bits in memory coupled to a data-protected processor port | Sathappan Palaniappan, Dharmesh Kishor Tirthdasani | 2014-04-22 |