Issued Patents All Time
Showing 76–100 of 358 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10331565 | Transactional memory system including cache versioning architecture to implement nested transactions | Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz | 2019-06-25 |
| 10324728 | Lightweight interrupts for condition checking | Giles R. Frazier, Michael K. Gschwind, Christian Jacobi, Joran S. C. Siu, Timothy J. Slegel +1 more | 2019-06-18 |
| 10318790 | Code fingerprint-based processor malfunction detection | Giles R. Frazier, Michael K. Gschwind, Christian Jacobi, Anthony Saporito | 2019-06-11 |
| 10318415 | Garbage collection facility grouping infrequently accessed data units in designated transient memory area | Giles R. Frazier, Michael K. Gschwind, Christian Jacobi, Younes Manton, Anthony Saporito | 2019-06-11 |
| 10310855 | Non-default instruction handling within transaction | Jonathan D. Bradbury, Michael K. Gschwind, Maged M. Michael, Eric M. Schwarz, Valentina Salapura | 2019-06-04 |
| 10293534 | Hybrid tracking of transaction read and write sets | Michael K. Gschwind, Valentina Salapura | 2019-05-21 |
| 10289414 | Suppressing branch prediction on a repeated execution of an aborted transaction | Michael K. Gschwind, Valentina Salapura | 2019-05-14 |
| 10282276 | Fingerprint-initiated trace extraction | Jonathan D. Bradbury, Giles R. Frazier, Michael K. Gschwind, Christian Jacobi, Anthony Saporito | 2019-05-07 |
| 10270775 | Mechanism for creating friendly transactions with credentials | Jonathan D. Bradbury, Fadi Y. Busaba, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz | 2019-04-23 |
| 10270773 | Mechanism for creating friendly transactions with credentials | Jonathan D. Bradbury, Fadi Y. Busaba, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz | 2019-04-23 |
| 10261826 | Suppressing branch prediction updates upon repeated execution of an aborted transaction until forward progress is made | Michael K. Gschwind, Valentina Salapura | 2019-04-16 |
| 10261791 | Bypassing memory access for a load instruction using instruction address mapping | Brian R. Prasky, David A. Schroter, Corey C Stappenbeck | 2019-04-16 |
| 10255189 | Mechanism for creating friendly transactions with credentials | Jonathan D. Bradbury, Fadi Y. Busaba, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz | 2019-04-09 |
| 10235297 | Mechanism for creating friendly transactions with credentials | Jonathan D. Bradbury, Fadi Y. Busaba, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz | 2019-03-19 |
| 10235201 | Dynamic releasing of cache lines | Jonathan D. Bradbury, Michael K. Gschwind, Timothy J. Slegel | 2019-03-19 |
| 10235168 | Load register on condition immediate or immediate instruction | Wolfgang Gellerich, Martin Schwidefsky, Kai Weber | 2019-03-19 |
| 10223268 | Transactional memory system including cache versioning architecture to implement nested transactions | Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz | 2019-03-05 |
| 10223154 | Hint instruction for managing transactional aborts in transactional memory computing environments | Fadi Y. Busaba, Harold W. Cain, III, Dan F. Greiner, Michael K. Gschwind, Maged M. Michael +2 more | 2019-03-05 |
| 10216635 | Instruction to cancel outstanding cache prefetches | Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz | 2019-02-26 |
| 10210019 | Hint instruction for managing transactional aborts in transactional memory computing environments | Fadi Y. Busaba, Harold W. Cain, III, Dan F. Greiner, Michael K. Gschwind, Maged M. Michael +2 more | 2019-02-19 |
| 10169267 | Transactional execution enabled supervisor call interruption while in TX mode | Jonathan D. Bradbury, Dan F. Greiner, Michael K. Gschwind | 2019-01-01 |
| 10169239 | Managing a prefetch queue based on priority indications of prefetch requests | Dan F. Greiner, Michael K. Gschwind, Christian Jacobi, Anthony Saporito, Timothy J. Slegel | 2019-01-01 |
| 10168961 | Hardware transaction transient conflict resolution | Jonathan D. Bradbury, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz +1 more | 2019-01-01 |
| 10162744 | Prefetch insensitive transactional memory | Michael K. Gschwind, Valentina Salapura, Timothy J. Slegel | 2018-12-25 |
| 10162743 | Prefetch insensitive transactional memory | Michael K. Gschwind, Valentina Salapura, Timothy J. Slegel | 2018-12-25 |