Issued Patents All Time
Showing 51–75 of 166 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9792120 | Anticipated prefetching for a parent core in a multi-core chip | Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Chung-Lung K. Shum | 2017-10-17 |
| 9766937 | Thread-based cache content saving for task switching | Harold W. Cain, III, David M. Daly, Vijayalakshmi Srinivasan | 2017-09-19 |
| 9747103 | Auxiliary branch prediction with usefulness tracking | James J. Bonanno, Michael J. Cadigan, Jr., Matthias D. Heizmann | 2017-08-29 |
| 9720694 | Silent mode and resource reassignment in branch prediction logic for branch instructions within a millicode routine | James J. Bonanno, Adam B. Collura, Daniel Lipetz, Anthony Saporito | 2017-08-01 |
| 9712500 | Distributed computing utilizing homomorphic encryption | Andrew Dow, Eli M. Dow, James P. Gilchrist, Gabriel J. Perez Irizarry, Gary S. Littlefield +2 more | 2017-07-18 |
| 9697128 | Prefetch threshold for cache restoration | Harold W. Cain, III, David M. Daly, Vijayalakshmi Srinivasan | 2017-07-04 |
| 9686247 | Distributed computing utilizing homomorphic encryption | Andrew Dow, Eli M. Dow, James P. Gilchrist, Gabriel J. Perez Irizarry, Gary S. Littlefield +2 more | 2017-06-20 |
| 9672045 | Checkpoints for a simultaneous multithreading processor | Adam B. Collura, Anthony Saporito | 2017-06-06 |
| 9652243 | Predicting out-of-order instruction level parallelism of threads in a multi-threaded processor | Ioana Monica Burcea, Alper Buyuktosunoglu, Vijayalakshmi Srinivasan | 2017-05-16 |
| 9639368 | Branch prediction based on correlating events | James J. Bonanno, Richard J. Moore | 2017-05-02 |
| 9632789 | Branch prediction based on correlating events | James J. Bonanno, Richard J. Moore | 2017-04-25 |
| 9626293 | Single-thread cache miss rate estimation | James J. Bonanno, Alper Buyuktosunoglu, Brian W. Curran, Willm Hinrichs, Christian Jacobi +4 more | 2017-04-18 |
| 9619385 | Single thread cache miss rate estimation | James J. Bonanno, Alper Buyuktosunoglu, Brian W. Curran, Willm Hinrichs, Christian Jacobi +4 more | 2017-04-11 |
| 9563430 | Dynamic thread sharing in branch prediction structures | James J. Bonanno, Daniel Lipetz, Anthony Saporito | 2017-02-07 |
| 9519485 | Confidence threshold-based opposing branch path execution for branch prediction | Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Chung-Lung K. Shum | 2016-12-13 |
| 9507598 | Auxiliary branch prediction with usefulness tracking | James J. Bonanno, Michael J. Cadigan, Jr., Matthias D. Heizmann | 2016-11-29 |
| 9501323 | Management of resources within a computing environment | Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Chung-Lung K. Shum | 2016-11-22 |
| 9448835 | Thread-based cache content saving for task switching | Harold W. Cain, III, David M. Daly, Vijayalakshmi Srinivasan | 2016-09-20 |
| 9442726 | Perceptron branch predictor with virtualized weights | James J. Bonanno, Michael J. Cadigan, Jr., Adam B. Collura, Matthias D. Heizmann, Daniel Lipetz | 2016-09-13 |
| 9436501 | Thread-based cache content saving for task switching | Harold W. Cain, III, David M. Daly, Vijayalakshmi Srinivasan | 2016-09-06 |
| 9430235 | Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors | Gregory W. Alexander, Khary J. Alexander, Brian W. Curran, Jonathan T. Hsieh, Christian Jacobi +2 more | 2016-08-30 |
| 9430241 | Semi-exclusive second-level branch target buffer | James J. Bonanno, Ulrich Mayer | 2016-08-30 |
| 9424044 | Silent mode and resource reassignment in branch prediction logic for branch instructions within a millicode routine | James J. Bonanno, Adam B. Collura, Daniel Lipetz, Anthony Saporito | 2016-08-23 |
| 9411599 | Operand fetching control as a function of branch confidence | Christian Jacobi, Barry W. Krumm, Martin Recktenwald, Chung-Lung K. Shum, Charles F. Webb +1 more | 2016-08-09 |
| 9411598 | Semi-exclusive second-level branch target buffer | James J. Bonanno, Ulrich Mayer | 2016-08-09 |